Commit Graph

369 Commits

Author SHA1 Message Date
thorpej 87fe867c21 Move the ARM, Ltd. floating point emulator to arch/arm. 2001-11-24 01:26:23 +00:00
thorpej fc019be5fd Use <arm/undefined.h> instead of <machine/undefined.h>. 2001-11-23 21:18:29 +00:00
thorpej 0c57d87232 Use <arm/cpufunc.h>, not <machine/cpufunc.h>. 2001-11-23 19:21:47 +00:00
thorpej d60ef922be Disable the BTB by default on the XScale again; there's some early
stepping errata to deal with before we can safely do this.
2001-11-23 19:17:04 +00:00
thorpej 5101f01dff Move even more constants into the shared 32-bit vmparam.h header.
Cleanup elsewhere will have to be done before we can sanitize this
header any further.
2001-11-23 18:16:10 +00:00
thorpej 15c76e3c84 - Move more contents of various <machine/vmparam.h> files into
<arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap
  implementation).
- Since the MMU definitions in pte.h are specific to ARM processors
  that support 32-bit mode, move pte.h to <arm/arm32/pte.h>.
- Make the Netwinder startup file build again (use PT_B|PT_C, rather
  than PT_CACHEABLE, since the latter expands to a variable these days).
2001-11-23 17:39:03 +00:00
thorpej fec02f1259 No need to pull in <machine/pte.h> directly. 2001-11-23 17:23:40 +00:00
thorpej 299362f0ff Pull in assym.h for __PROG32 (needed for IRQenable/IRQdisable macros,
which should probably be pulled out of cpu.h anyway...)
2001-11-23 16:53:07 +00:00
thorpej 926df47ec4 Provide __PROG32 to assembly code. 2001-11-23 16:50:48 +00:00
thorpej b393d0d3f7 Kill <machine/katelib.h>. Any place that still uses it should just
reference <arm/arm32/katelib.h> until such time as all use of this
file has been purged from the face of the earth.
2001-11-22 18:34:30 +00:00
thorpej 88bba2e5a4 Add cpu_cpwait() calls after TLB updates that are not expected to
be followed up by a pmap_update().
2001-11-22 18:24:43 +00:00
thorpej 67fd41ddbf Add 26-bit and 32-bit types.h files, which indicate the programming
model in use for a given platform (__PROG26 vs __PROG32), then pulls
in <arm/types.h>.  Change each ARM port to pull in <arm/arm26/types.h>
or <arm/arm32/types.h> as appropriate.  Change all references to PROG26
and PROG32 to __PROG26 and __PROG32.  Eliminate the opt_progmode.h
header file.
2001-11-22 17:59:57 +00:00
lukem 03aef4723c cleanup:
options SPACE TAB
	makeoptions TAB
	psuedo-device TAB
	remove trailing whitespace
	replace multiple spaces -> tabs
	options "FOO" -> options FOO
	options "FOO=bar" -> options FOO=bar
	options "FOO=\"bar\"" -> options FOO="\"bar\""
2001-11-20 12:56:17 +00:00
lukem 99bccc3cab - pull in opt_kgdb.h where necessary
- replace opt_kgdb_machdep.h with opt_kgdb.h
- defparam opt_kgdb.h:
	KGDB_DEV KGDB_DEVNAME KGDB_DEVADDR KGDB_DEVRATE KGDB_DEVMODE
- move from opt_ddbparam.h to opt_ddb.h:
	DDB_FROMCONSOLE DDB_ONPANIC DDB_HISTORY_SIZE DDB_BREAK_CHAR SYMTAB_SPACE
- replace KGDBDEV with KGDB_DEV
- replace KGDBADDR with KGDB_DEVADDR
- replace KGDBMODE with KGDB_DEVMODE
- replace KGDBRATE with KGDB_DEVRATE
- use `9600' instead of `0x2580' for 9600 baud rate
- use correct quotes for  options KGDB_DEVNAME="\"com\""
- use correct quotes for  options KGDB_DEV="17*256+0"
- remove unnecessary dependancy on Makefile for kgdb_stub.o
- minor whitespace cleanup
2001-11-20 08:43:19 +00:00
chris 04d6054972 Correct comment to avoid confusion, it really means 32 bits not 32 bites. 2001-11-20 00:22:33 +00:00
chris 165b023373 Give the idle loop a non-profiled entry, means it appears in profile info correctly (rather than all it's time being under remrunqueue)
switch_exit only needs to take 1 parameter, it loads the value of proc0 into R1 itself
Fixup some comments to reflect the real state of things.
Tweak a couple of bits of asm to avoid a load delay.
remove excess code for setting curpcb and curproc.
2001-11-19 20:38:58 +00:00
thorpej 2d7fd0a8b8 Implement pmap_update(). Currently it just calls cpu_cpwait(),
which ensures that TLB/cache operations have completed.
2001-11-19 18:41:32 +00:00
thorpej 887bcc078e Add a "cpwait" cpufunc, currently a nullop on all but XScale.
"cpwait" ensures that all coprocessor operations have completed
before returning.
2001-11-19 18:40:15 +00:00
bjh21 6b12ec55b2 Add prototypes for undefinedinstruction() and resethandler(). 2001-11-16 13:12:06 +00:00
thorpej 0b6370bfee Implement __cpu_simple_lock*() primitives using the SWP insn. Note
this insn is available only on ARM arch v3 and later (and 2a).  We
don't expect to be using these ops in the kernel on processors too
old to have SWP, and for userland uses (in e.g. a pthread library),
the kernel will simply have to trap and emulate the insn (it needs
to be "atomic", so a kernel trap of some sort will be necessary on
such platforms anyway).
2001-11-15 19:22:32 +00:00
thorpej be13b85887 * Give the XScale its own cpu_control() entry point; we have to flush
the Branch Target Buffer of the BPRD bit changes.
* Enable Branch Prediction on the XScale by default.
* Don't invalidate the Branch Target Buffer explicitly. the i80200
  manual (section 5.1, Branch Target Buffer Operation) notes that
  manual software management of the BTB is unnecessary; it is flushed
  implicitly when:
     * processor resets
     * FCSE process ID is written
     * I-cache is invalidated
2001-11-14 01:00:05 +00:00
thorpej 91f49d269d Eliminate some duplicated code here (similar to XScale code):
* sa110_cache_purgeD() is the same as sa110_cache_cleanD() on the
  SA-1 -- make it an alias.
* sa110_cache_syncI() and sa110_cache_purgeID() are identical to
  sa110_cache_cleanD() on the SA-1, with the exception that the
  I-cache must also be flushed.  Save code duplication by moving
  the I-cache flush before the D-cache clean and letting it fall
  through.
2001-11-14 00:08:05 +00:00
chris 8298c55eab Correct comments for ffs algoritm (it isn't using register r0) 2001-11-11 22:07:41 +00:00
thorpej b75edaf367 Some fixes/cleanup to the XScale cache clean code:
* Define a CPWAIT macro as described in the i80200 manual and use it,
  rather than replicating the code in a few places.
* The i80200 manual notes that the line-allocate operation used to
  do global D$ clean does not actually perform a load/fill request
  from external memory, and thus does not actually place valid data
  in the cache lines allocated.  Require that machine-dependent code
  allocate an appropriately-sized chunk of unmapped VA space for the
  global clean operation in order to avoid unpredictable results.
* The i80200 manual notes that the VA range for the Mini-Data global
  clean (which *must* be mapped to physical memory) must be reserved
  exclusively for cleaning the Mini-Data cache.  Require that machine-
  dependent code allocate an appropriately-sized chunk of memory for
  this purpose.
2001-11-11 17:18:27 +00:00
thorpej c653a0ee51 Even though the ARM architecture defines large, standard, and small
pages, we use the standard (4K) page size as PAGE_SIZE.  Make the
PAGE_SIZE related variables compile-time constants that reflect this.

Results in a bit over 2K worth of .text savings, and visibly better
code in the places that use PAGE_SIZE, etc.
2001-11-11 16:40:36 +00:00
thorpej 2ea8a793d0 * Define prologue/epilogue macros for the cache clean functions,
and use them, like we do in the SA-1 code.
* Use numbered labels for loops.
2001-11-11 01:05:11 +00:00
thorpej 3492e0ce0b Fix a missing-whitespace typo. 2001-11-11 01:02:58 +00:00
thorpej eb8206f223 Use numeric labels for loops. 2001-11-11 00:47:49 +00:00
thorpej de8e924e4c * Define prologue/epilogue macros for the cache clean functions,
and use them, rather than replicating the code several times.
* Use numbered labels for loops.
2001-11-11 00:41:48 +00:00
thorpej fe9e809208 Add a comment explaining that we expect the memory controller
registers to already be subregion'd off, and actually init
the PCI DMA tag.
2001-11-10 23:14:51 +00:00
thorpej 9e1b785626 Split all the model/version-specific cpufuncs into separate files
corresponding to the model/version.
2001-11-10 23:14:08 +00:00
thorpej a27687fb2f Fix some whitespace. 2001-11-10 23:12:41 +00:00
thorpej fa6ae96384 This file is not used. 2001-11-10 00:13:58 +00:00
thorpej d1f4bf74ca Add support for PCI DMA on the i80312. We currently just do
DMA via the Secondary Inbound window, for now.  Will probably
need to revisit this at some point.

Require that the board-specific i80312 front-end slice off a
subregion for the memory controller before calling i80312_attach(),
and fix a bug in the IQ80310 front-end that caused the Secondary
Inbound window to be configured incorrectly.
2001-11-09 23:15:52 +00:00
thorpej d32191e3da Add support for configuring the PCI bus (starting with the Secondary
bus only, for now).

XXX Some cleanup wrt. pci_conf_interrupt() needs to happen.
2001-11-09 19:48:35 +00:00
thorpej 671a1b111f Print the fault PC for non-USR Prefetch Aborts. 2001-11-09 19:04:23 +00:00
thorpej 82c11eec1c Clear the Master Abort after reading config space for a non-existent
PCI device.  Disable debugging messages, as PCI config space works now.
2001-11-09 18:04:10 +00:00
thorpej 42a10f6cd4 Implement a badaddr_read() routine which performs a load of the
specified size for the caller, and returns true or false indicating
whether or not a Data Abort occurred (i.e. the address was "bad").
2001-11-09 17:58:00 +00:00
thorpej d16c00cfb2 Disable the ATU interrupt sources (i.e. interrupts that occur when
we get Master or Target aborts).
2001-11-09 17:44:43 +00:00
thorpej 10392361f8 Make the DDB trace output a lot easier to look at. 2001-11-09 16:49:29 +00:00
thorpej 147b1bdc1c Add some rudimentary support for ELF symbols in DDB on the ARM ports.
On platforms which load the kernel sans symbols directly from firmware
(possibly in e.g. S-Record format), call ddb_init() with empty arguments,
so that it will search any compiled in SYMTAB_SPACE.  On all other platforms,
if __ELF__, also call ddb_init() with empty arguments until ELF bootloaders
which pass symbol information are ready.
2001-11-09 07:21:37 +00:00
thorpej 660b98b7dc Snapshot of work-in-progress for Intel i80312 Companion I/O chip;
just basic Inbound and Outbound window setup is done, PCI configuration
space access (not quite working yet), and I/O and Memory space routines
so far.
2001-11-09 03:27:51 +00:00
thorpej 64f23a2423 Adjust the way the PMMRs are defined -- offsets from a base, not
absolutes.  Also, add PPB and more ATU registers.
2001-11-08 03:20:36 +00:00
thorpej b9364bb468 First cut at XScale setup code. Needs more work. 2001-11-07 00:17:36 +00:00
thorpej 46309d6bc6 Const poisoning of cpu/class names. 2001-11-06 20:39:13 +00:00
thorpej 5b3f78d953 "i80200", not "80200". 2001-11-06 20:02:13 +00:00
thorpej f12c8ee306 "XScale", not "Xscale". 2001-11-06 19:59:43 +00:00
thorpej e8982cb969 Make it possible for Makefile.${MACHINE}.inc to provide extra
stuff at the end of SYSTEM_LD_TAIL.
2001-11-06 19:52:21 +00:00
thorpej af0d2bf570 Config info for the i80312 XScale companion I/O chip. 2001-11-05 23:38:55 +00:00
thorpej 20b742fd48 RCS ID. 2001-11-05 23:38:05 +00:00