Add a "cpwait" cpufunc, currently a nullop on all but XScale.
"cpwait" ensures that all coprocessor operations have completed before returning.
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc.c,v 1.15 2001/11/14 01:00:05 thorpej Exp $ */
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/* $NetBSD: cpufunc.c,v 1.16 2001/11/19 18:40:15 thorpej Exp $ */
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/*
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* arm7tdmi support code Copyright (c) 2001 John Fremlin
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@ -61,7 +61,8 @@
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struct cpu_functions arm3_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_id, /* id */
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cpufunc_nullop, /* cpwait */
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/* MMU functions */
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@ -131,8 +132,9 @@ struct cpu_functions arm3_cpufuncs = {
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struct cpu_functions arm6_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_id, /* id */
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cpufunc_nullop, /* cpwait */
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/* MMU functions */
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cpufunc_control, /* control */
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@ -205,7 +207,8 @@ struct cpu_functions arm6_cpufuncs = {
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struct cpu_functions arm7_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_id, /* id */
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cpufunc_nullop, /* cpwait */
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/* MMU functions */
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@ -275,7 +278,8 @@ struct cpu_functions arm7_cpufuncs = {
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struct cpu_functions arm7tdmi_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_id, /* id */
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cpufunc_nullop, /* cpwait */
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/* MMU functions */
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@ -345,7 +349,8 @@ struct cpu_functions arm7tdmi_cpufuncs = {
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struct cpu_functions arm8_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_id, /* id */
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cpufunc_nullop, /* cpwait */
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/* MMU functions */
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@ -415,6 +420,7 @@ struct cpu_functions arm9_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_nullop, /* cpwait */
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/* MMU functions */
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@ -484,7 +490,8 @@ struct cpu_functions arm9_cpufuncs = {
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struct cpu_functions sa110_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_id, /* id */
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cpufunc_nullop, /* cpwait */
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/* MMU functions */
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@ -553,7 +560,8 @@ struct cpu_functions sa110_cpufuncs = {
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struct cpu_functions xscale_cpufuncs = {
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/* CPU functions */
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cpufunc_id, /* id */
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cpufunc_id, /* id */
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xscale_cpwait, /* cpwait */
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/* MMU functions */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc_asm_xscale.S,v 1.4 2001/11/14 01:00:05 thorpej Exp $ */
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/* $NetBSD: cpufunc_asm_xscale.S,v 1.5 2001/11/19 18:40:15 thorpej Exp $ */
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/*
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* Copyright (c) 2001 Matt Thomas
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@ -53,6 +53,10 @@ Lblock_userspace_access:
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mov r0, r0 /* wait for it to complete */ ;\
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sub pc, pc, #4 /* branch to next insn */
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ENTRY(xscale_cpwait)
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CPWAIT
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mov pc, lr
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/*
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* We need a separate cpu_control() entry point, since we have to
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* invalidate the Branch Target Buffer in the event the BPRD bit
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/* $NetBSD: cpufunc.h,v 1.11 2001/11/14 01:00:06 thorpej Exp $ */
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/* $NetBSD: cpufunc.h,v 1.12 2001/11/19 18:40:15 thorpej Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe.
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@ -54,6 +54,7 @@ struct cpu_functions {
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/* CPU functions */
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u_int (*cf_id) __P((void));
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void (*cf_cpwait) __P((void));
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/* MMU functions */
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@ -121,6 +122,7 @@ extern struct cpu_functions cpufuncs;
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extern u_int cputype;
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#define cpu_id() cpufuncs.cf_id()
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#define cpu_cpwait() cpufuncs.cf_cpwait()
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#define cpu_control(c, e) cpufuncs.cf_control(c, e)
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#define cpu_domains(d) cpufuncs.cf_domains(d)
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@ -307,6 +309,8 @@ void sa110_setup __P((char *string));
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#endif /* CPU_SA110 */
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#ifdef CPU_XSCALE
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void xscale_cpwait __P((void));
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u_int xscale_control __P((u_int clear, u_int bic));
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void xscale_setttb __P((u_int ttb));
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