Add a "cpwait" cpufunc, currently a nullop on all but XScale.

"cpwait" ensures that all coprocessor operations have completed
before returning.
This commit is contained in:
thorpej 2001-11-19 18:40:15 +00:00
parent f270ebd294
commit 887bcc078e
3 changed files with 27 additions and 11 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: cpufunc.c,v 1.15 2001/11/14 01:00:05 thorpej Exp $ */
/* $NetBSD: cpufunc.c,v 1.16 2001/11/19 18:40:15 thorpej Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@ -61,7 +61,8 @@
struct cpu_functions arm3_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
@ -131,8 +132,9 @@ struct cpu_functions arm3_cpufuncs = {
struct cpu_functions arm6_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
cpufunc_control, /* control */
@ -205,7 +207,8 @@ struct cpu_functions arm6_cpufuncs = {
struct cpu_functions arm7_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
@ -275,7 +278,8 @@ struct cpu_functions arm7_cpufuncs = {
struct cpu_functions arm7tdmi_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
@ -345,7 +349,8 @@ struct cpu_functions arm7tdmi_cpufuncs = {
struct cpu_functions arm8_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
@ -415,6 +420,7 @@ struct cpu_functions arm9_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
@ -484,7 +490,8 @@ struct cpu_functions arm9_cpufuncs = {
struct cpu_functions sa110_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_id, /* id */
cpufunc_nullop, /* cpwait */
/* MMU functions */
@ -553,7 +560,8 @@ struct cpu_functions sa110_cpufuncs = {
struct cpu_functions xscale_cpufuncs = {
/* CPU functions */
cpufunc_id, /* id */
cpufunc_id, /* id */
xscale_cpwait, /* cpwait */
/* MMU functions */

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@ -1,4 +1,4 @@
/* $NetBSD: cpufunc_asm_xscale.S,v 1.4 2001/11/14 01:00:05 thorpej Exp $ */
/* $NetBSD: cpufunc_asm_xscale.S,v 1.5 2001/11/19 18:40:15 thorpej Exp $ */
/*
* Copyright (c) 2001 Matt Thomas
@ -53,6 +53,10 @@ Lblock_userspace_access:
mov r0, r0 /* wait for it to complete */ ;\
sub pc, pc, #4 /* branch to next insn */
ENTRY(xscale_cpwait)
CPWAIT
mov pc, lr
/*
* We need a separate cpu_control() entry point, since we have to
* invalidate the Branch Target Buffer in the event the BPRD bit

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@ -1,4 +1,4 @@
/* $NetBSD: cpufunc.h,v 1.11 2001/11/14 01:00:06 thorpej Exp $ */
/* $NetBSD: cpufunc.h,v 1.12 2001/11/19 18:40:15 thorpej Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@ -54,6 +54,7 @@ struct cpu_functions {
/* CPU functions */
u_int (*cf_id) __P((void));
void (*cf_cpwait) __P((void));
/* MMU functions */
@ -121,6 +122,7 @@ extern struct cpu_functions cpufuncs;
extern u_int cputype;
#define cpu_id() cpufuncs.cf_id()
#define cpu_cpwait() cpufuncs.cf_cpwait()
#define cpu_control(c, e) cpufuncs.cf_control(c, e)
#define cpu_domains(d) cpufuncs.cf_domains(d)
@ -307,6 +309,8 @@ void sa110_setup __P((char *string));
#endif /* CPU_SA110 */
#ifdef CPU_XSCALE
void xscale_cpwait __P((void));
u_int xscale_control __P((u_int clear, u_int bic));
void xscale_setttb __P((u_int ttb));