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Disable the ATU interrupt sources (i.e. interrupts that occur when

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we get Master or Target aborts).
This commit is contained in:
thorpej 2001-11-09 17:44:43 +00:00
parent 10392361f8
commit d16c00cfb2
2 changed files with 27 additions and 2 deletions
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17
sys/arch/arm/xscale/i80312.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: i80312.c,v 1.1 2001/11/09 03:27:51 thorpej Exp $ */
/* $NetBSD: i80312.c,v 1.2 2001/11/09 17:44:43 thorpej Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@ -147,6 +147,21 @@ i80312_attach(struct i80312_softc *sc)
bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
I80312_ATU_SIATV, sc->sc_sin_xlate);
/*
* Mask (disable) the ATU interrupt sources.
* XXX May want to revisit this if we encounter
* XXX an application that wants it.
*/
bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
I80312_ATU_PAIM,
ATU_AIM_MPEIM | ATU_AIM_TATIM | ATU_AIM_TAMIM |
ATU_AIM_MAIM | ATU_AIM_SAIM | ATU_AIM_DPEIM |
ATU_AIM_PSTIM);
bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
I80312_ATU_SAIM,
ATU_AIM_MPEIM | ATU_AIM_TATIM | ATU_AIM_TAMIM |
ATU_AIM_MAIM | ATU_AIM_SAIM | ATU_AIM_DPEIM);
/*
* Clear:
*

12
sys/arch/arm/xscale/i80312reg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: i80312reg.h,v 1.7 2001/11/09 03:27:52 thorpej Exp $ */
/* $NetBSD: i80312reg.h,v 1.8 2001/11/09 17:44:43 thorpej Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -245,6 +245,16 @@
#define ATU_ACR_SATUDRCA (1U << 20)
#define ATU_ACR_BFN (1U << 21)
#define ATU_AIM_AETAE (1U << 0)
#define ATU_AIM_AIESE (1U << 1)
#define ATU_AIM_MPEIM (1U << 2)
#define ATU_AIM_TATIM (1U << 3)
#define ATU_AIM_TAMIM (1U << 4)
#define ATU_AIM_MAIM (1U << 5)
#define ATU_AIM_SAIM (1U << 6)
#define ATU_AIM_DPEIM (1U << 7)
#define ATU_AIM_PSTIM (1U << 8)
/*
* Messaging Unit
*/