the address of the desired PTE location is readily available in the
callers context (setpte4m() retraces the entire 3-level structure
to arrive at the PTE location).
Also, in many cases we can do away with the distinction between pmaps
that have or have not allocated a context. This is really only useful
in cases where we're interested in the REF or MOD bits which can differ
in the TLB version of a PTE. By doing this, we avoid getpte()'s which
in many cases instruct the MMU to start a table walk only to find out
that there's nothing there after going 2/3 of the way, or waste a TLB
entry because of TLB flushing soon after getpte() completes.
In addition, there's a hook to flush the cache line corresponding to
the (kernel virtual) location of a PTE entry when it gets altered.
Anne Hutton <hutton@isi.edu>]:
- add support for Adaptec 155 PCI ATM cards (e.g. ANA-5940)
- add sc->is_adaptec to handle differences between cards.
- break out MID_MK_TXQ/MID_MK_RXQ seperate macros to handle
the new Adaptec format TXQ/RXQ.
- adjust en_dqneed to return 1 on ADP (since the Adaptec can
DMA anything in one DRQ/DTQ!)
- add hook for a bus specific reset function (adaptec has
a seperate reset register that needs to be hit when
resettting the midway).
- adjust DMA test to not worry about burst sizes on the
adaptec (since it handles it all for us!) and to handle
the new DTQ/DRQ format.
- add Adaptec DMA support to en_txlaunch() and en_service()
BUG FIXES:
- fixed receiver panic under heavy load ("lost mbuf in slot 0!").
when the reassembly buffer overflows, the T-bit is set in
the RDB and the data field is empty. en_service() sets up
a 4-byte (RDB size) dummy DMA without IF_ENQUEUE. but the
recv intr handling in en_intr() always does IF_DEQUEUE.
as a result, a successive recv intr loses its mbuf and
leads to a panic. the solution is to only IF_DEQUEUE if
the interrupt has non-zero length (indicating that there
is an mbuf to get). in order for this to work, EN_DQ_MK
must always be non-zero. we do this by or'ing in an unused
bit (0x80000).
reported by: Kenjiro Cho <kjc@csl.sony.co.jp>
- fix setting of transmit channel when txspeed[] is non-zero
(e.g. traffic shaping). the old scheme didn't work
properly (it allowed the same VCI to use multiple tx channels
thus defeating the txspeed[] parameter). the new scheme
statically assigns a VC to a channel when txspeed[] is set.
[note that the code to set txspeed[] isn't in the driver right
now since a MI interface to do this hasn't been made yet]
we add sc->txvc2slot[] and sc->txslot[n].nref for this.
reported by: Kenjiro Cho <kjc@csl.sony.co.jp>,
Milind M Buddihikot <milind@ccrc.wustl.edu>,
Dong Lin <dong@eecs.harvard.edu>
- when doing SRAM copies, be sure to round up the length to the next
largest word (otherwise the driver will try to do a byte clean
up DMA and then get an ID error interrupt).
MINOR CLEANUPS:
- clean up loops in DMA test
contributed by: Kenjiro Cho <kjc@csl.sony.co.jp>
- restructure and cleanup of en_read/en_write macros/inlines
- clean up some byte ordering stuff so that we are consistant throughout
the driver
correspond to the ANA numbers... certainly includes ANA-5940.
- add Efficient Nets product 0x0000. according to linux pci.h
the 0x0000 is an FPGA version of the midway card and the 0x0002
is the ASIC version.
- Indent some comments appropriately per KNF.
- Output all diagnostics using the device name rather than a static string.
- Fix a (mostly marmless) bug in snintr(), where loss of heartbeat wasn't
properly ignored and could mask the `receive descriptors exhausted'
diagnostic.
* Use machine/conf.h not sys/conf.h to get the prototypes for the
scn cdev functions.
* Include <sys/kgdb.h> to get prototypes for kgdb_connect and kgdb_attach.
* Add missing prototypes for some functions.
* Make ddb work before the console was opend. Thank's to Ian Dall
for this change. His comment:
Also, ddb doesn't work if a break is set before the console
is opened. That is because DTR and RTS are not asserted. It
would probably work if the console is wired to ingnore DTR
or RTS. The change below is probably not very correct.
Proabably the state of DTR and RTS should be saved and DTR
and RTS asserted on the start of a polled serial input and
the saved values restored on exiting polled input
* Remove unused function scn_ei.
* Add prototype for ncr_ready.
* Add ncr_wait_not_req function from Ian Dall:
The ncr_wait_not_req business is to avoid a potential race.
When the pseudo DMA finishes, the target may not have
lowered REQ yet. If we just charge ahead, we eventually test
for phase when REQ is high. However, if REQ has not yet gone
low for the last byte transferred, this will be the wrong
phase. This is taken from the dp8490 application notes. The
last ACK is not deasserted until the dma is completed.
Deasserting the last ACK should be delayed until the last
REQ is deasserted. I am not sure if there are ever devices
this slow, but I believe the code is "more correct".
* Add missing prototypes.
* Move over softnet() from intr.c.
* Establish softnet and softclock interrupts in init532.
* Misc cleanup to get it compiled with the new CWARNFLAGS.
