232fa45996
Add bus tags to softc.
1998-03-21 20:29:57 +00:00
a21d934940
Add bus tags.
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Add interrupt chaining facility (currently used for `le'; the `esp'
device should follow).
1998-03-21 20:28:44 +00:00
087da728f2
Add bus tags to softc.
1998-03-21 20:25:12 +00:00
c99d62cc8a
Account for changed bus attachment scheme.
1998-03-21 20:23:38 +00:00
be7f5a7031
Switch to a bus_space(9)-based device attachment scheme.
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The dma & lebuffer devices behave like busses to accommodate the
OBP layout. For practical purposes, they are implemented as
Sbus "extensions".
1998-03-21 20:23:09 +00:00
69fe6f242f
Account for changed bus attachment scheme.
1998-03-21 20:11:30 +00:00
165120cfaf
Sbus attach arguments and map function prototypes go here.
1998-03-21 20:10:07 +00:00
77f499595c
Switch to a bus_space(9)-based device attachment scheme.
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- device attachment arguments contain bus-specific
address and interrupt levels.
- devices must call back on bus map functions to get their
addresses and interrupt levels translated properly.
- sun4m's obio bus is treated like an Sbus slot.
- the sun4-style obio bus has its own attach arguments
and map functions.
1998-03-21 19:55:31 +00:00
73f387899e
#define several register bank offsets, so we don't need to refer to
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structure fields.
1998-03-21 19:45:45 +00:00
61365a8b8e
Add bus tags to softc.
1998-03-21 19:43:17 +00:00
83cec33afc
Split the fb_setsize() utility in two separate functions: one to be
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used by OBP machines and another one for sun4/eeprom machines.
1998-03-21 19:42:00 +00:00
66190b4b99
Remove old `confargs' structure which is no longer used; extract the
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structures representing the ROM properties.
Also, define the `mainbus' and `obio' attach arguments here.
1998-03-21 19:36:27 +00:00
9e69994eaa
Add `interrupt establish' and ` device mmap' methods and macros to
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match to the bus tag structure.
1998-03-21 19:31:27 +00:00
9c3abc26a4
Add RCS-Id & copyright.
1998-03-21 12:29:29 +00:00
71fc7f093d
The iommu "bus" now presents its own attach arguments to its children.
1998-03-21 12:21:18 +00:00
d19772ea9e
Transform `mainbus' attach code to use its own attach arguments.
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Add a couple rom-property helper functions; some overlapping functionality
with existing function, but hold on to the latter for just a while.
1998-03-21 12:18:25 +00:00
8d63cb6db8
Remove incorrect address validity check in two `#if DEBUG' sections.
1998-03-21 11:32:43 +00:00
1ccb578b36
We can't currently attach `audioamd' at `obio'.
1998-03-21 11:15:25 +00:00
04730ad038
Declare separate bus attachments for devices that can occur on multiple busses.
1998-03-21 11:12:56 +00:00
cad3cb3894
ubasetup() must be non-static. (used by QDSS)
1998-03-21 10:24:29 +00:00
cf02ad2bc9
Add support for QDSS graphic console. Code originated from 4.4BSD,
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ported to NetBSD by Boris Gjenero <bgjenero@undergrad.math.uwaterloo.ca>
1998-03-21 10:02:39 +00:00
2f2b4dae56
Optimize some cycles out of the clock interrupt handler when
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USE_LEDS is defined.
1998-03-21 08:05:37 +00:00
727b8bc7ac
Charles Hannum pointed out that if a clock interrupt was posted while
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we were in ledcontrol(), the heartbeat twinkler would just punt on
updating the LED even though it had already updated the status. (This
was broken in v1.73 of locore.s).
Rather than resurrect the old code, simplify ledcontrol() and don't
bother with mutual exclusion. As mentioned by the comments describing
this function, we really don't need to be that precise. We do, however,
want to guarantee instructions that modify the status variable directly,
so the function is now primarily inline assembly.
1998-03-21 07:45:59 +00:00
2ada4b4af1
Replace TS_WOPEN with t_wopen, per mail on tech-kern.
1998-03-21 04:02:47 +00:00
66d8f5b544
sync systypes w/ <machine/rpb.h>
1998-03-20 21:48:21 +00:00
63c73f94e3
Add a few more systypes.
1998-03-20 21:48:03 +00:00
919340aaa5
In npxdna(), if there was an exception state in the FPU but npxproc was
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null, the frstor would fault on a PPro. I'm pretty sure this is not
how the chip is supposed to behave, but it's easy enough to do a fninit
to throw away the exception state.
Also, some other minor changes to the documentation.
1998-03-20 20:15:14 +00:00
3b25c8611a
sync to current state.
1998-03-20 19:15:18 +00:00
52defbf438
Use rom routines on MicroVAX II, so that the QDSS/QVSS display will
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be used if present. Fix provided by Boris Gjenero.
1998-03-20 16:36:20 +00:00
525ebe8083
prepare for PMAP_NEW.
1998-03-19 22:10:21 +00:00
ff58f2dd3a
update to my current configuration
1998-03-19 22:09:24 +00:00
0f95ffdc1d
Nuke swpctxt(); it's only used by the Mach pmap, which we will only ever
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use for reference.
1998-03-19 06:44:25 +00:00
003c50d1d5
Add a macro to invalidate the TLB for a given pmap/va pair. TLB
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invalidation algorithm:
if (old mapping had PG_ASM set || pmap is active) {
TIBS(va);
if (also sync I-stream)
imb();
}
The check for "old mapping had PG_ASM" will get all kernel mappings (since
kernel mappings always have PG_ASM set).
This allows us to remove the bogus check for the kernel pmap in
active_pmap() - do so.
Use the new TLB invalidation macro whenever such action is needed.
1998-03-18 23:55:25 +00:00
15adb17803
Eliminate the last argument from pmap_remove_mapping(); it makes its own
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decisions about TLB invalidation.
1998-03-18 23:11:44 +00:00
7ee4af11a7
Change active_pmap() to use the CPU mask (XXX and check for kernel pmap
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as well, until some other changes are made). Nuke active_user_pmap(),
and change the places that used it to use active_pmap() instead (as well
as make some DIAGNOSTIC consistency checks).
1998-03-18 22:50:50 +00:00
ddc5b81d4f
68060 has 8k + 8k caches.
1998-03-18 22:19:40 +00:00
605472f676
Optimize out a TLB invalidation in a common case of pmap_enter(): if
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the PTE was previously invalid, no TLB invalidation is necessary because:
(1) when a PTE is invalidated, its entry is flushed from the
TLB
(2) the PALcode won't install an invalid PTE into the TLB.
1998-03-18 22:13:58 +00:00
e14a1c1120
Switch the pc532 to MACHINE_NEW_NONCONTIG and add machine specific bits
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for UVM. All of this was mostly done by stealing code from the i386 port.
Prepare for stealing pmap.new.c as well.
1998-03-18 21:59:38 +00:00
cfdf9a95ad
Keep track of which CPUs are using a pmap by setting/clearing bits
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in the pmap's CPU mask in pmap_activate()/pmap_deactivate().
1998-03-18 21:57:03 +00:00
214f303d0e
Import from i386 because it contains a nice explanation of our MMU.
1998-03-18 21:52:02 +00:00
43614761e3
In cpu_exit() deactivate the address space before freeing the vmspace
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structure. We will continue to run on this context (which is the
global Lev1map at this point) right up until we switch to proc0's
context in switch_exit().
1998-03-18 20:38:07 +00:00
87eb2cfded
Don't call pmap_deactivate() if we jumped into the middle of cpu_switch()
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from switch_exit(), since by this time, the vmspace will have already
been deactivated and freed.
1998-03-18 20:36:13 +00:00
b637a998f4
Add ASN housekeeping and a CPU mask to the pmap.
1998-03-18 19:39:23 +00:00
961a955498
Move the "are we active" macros out of the header file.
1998-03-18 19:27:46 +00:00
d37acae24c
Add a DIAGNOSTIC checks for the kernel pmap in pmap_create_lev1map()
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and pmap_destroy_lev1map(). Correct a comment in another DIAGNOSTIC
panic.
1998-03-18 19:21:50 +00:00
06b49b8f3e
Change a couple of assert()s to DIAGNOSTIC panics.
1998-03-18 19:12:57 +00:00
438599b408
Correct a comment in pmap_bootstrap().
1998-03-18 19:04:42 +00:00
56e004c995
Pass the max ASN from the HWRPB to pmap_boostrap().
1998-03-18 19:02:49 +00:00
426d2953f5
Add a macro to test if PG_ASM (Address Space Match) is set in a PTE.
1998-03-18 19:00:15 +00:00
9f50fca1fd
Add commented out "options FFS_EI"
1998-03-18 16:34:41 +00:00
pk