Switch to a bus_space(9)-based device attachment scheme.

- device attachment arguments contain bus-specific
	  address and interrupt levels.

	- devices must call back on bus map functions to get their
	  addresses and interrupt levels translated properly.

	- sun4m's obio bus is treated like an Sbus slot.

	- the sun4-style obio bus has its own attach arguments
	  and map functions.
This commit is contained in:
pk 1998-03-21 19:55:31 +00:00
parent 73f387899e
commit 77f499595c
2 changed files with 607 additions and 332 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: obio.c,v 1.39 1998/01/25 19:44:43 pk Exp $ */
/* $NetBSD: obio.c,v 1.40 1998/03/21 19:55:31 pk Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -36,36 +36,6 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1993, 1994 Theo de Raadt
* Copyright (c) 1995, 1997 Paul Kranenburg
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Theo de Raadt.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
@ -79,6 +49,8 @@
#include <vm/vm.h>
#include <machine/bus.h>
#include <sparc/dev/sbusvar.h>
#include <machine/autoconf.h>
#include <machine/pmap.h>
#include <machine/oldmon.h>
@ -87,31 +59,55 @@
#include <sparc/sparc/asm.h>
#include <sparc/sparc/vaddrs.h>
#include <sparc/sparc/cpuvar.h>
#include <sparc/dev/sbusvar.h>
struct bus_softc {
union {
struct device scu_dev; /* base device */
struct sbus_softc scu_sbus; /* obio is another sbus slot */
} bu;
struct obio4_softc {
struct device sc_dev; /* base device */
bus_space_tag_t sc_bustag; /* parent bus tag */
bus_dma_tag_t sc_dmatag; /* parent bus dma tag */
};
union obio_softc {
struct device sc_dev; /* base device */
struct obio4_softc sc_obio; /* sun4 obio */
struct sbus_softc sc_sbus; /* sun4m obio is another sbus slot */
};
/* autoconfiguration driver */
int obioprint __P((void *, const char *));
static int obiomatch __P((struct device *, struct cfdata *, void *));
static void obioattach __P((struct device *, struct device *, void *));
static int obiomatch __P((struct device *, struct cfdata *, void *));
static void obioattach __P((struct device *, struct device *, void *));
#if defined(SUN4)
static void obioattach4 __P((struct device *, struct device *, void *));
int obiosearch __P((struct device *, struct cfdata *, void *));
#endif
#if defined(SUN4M)
static void obioattach4m __P((struct device *, struct device *, void *));
static int obioprint __P((void *, const char *));
static int obiosearch __P((struct device *, struct cfdata *, void *));
static int obio_bus_mmap __P((void *, bus_type_t, bus_addr_t, int));
static int obio_find_rom_map __P((bus_addr_t, bus_type_t, int,
bus_space_handle_t *));
#endif
struct cfattach obio_ca = {
sizeof(struct bus_softc), obiomatch, obioattach
sizeof(union obio_softc), obiomatch, obioattach
};
#if defined(SUN4)
static struct sparc_bus_space_tag obio_space_tag = {
NULL, /* cookie */
NULL, /* bus_space_map */
NULL, /* bus_space_unmap */
NULL, /* bus_space_subregion */
NULL, /* bus_space_barrier */
obio_bus_mmap, /* bus_space_mmap */
NULL /* bus_intr_establish */
};
#endif
/*
* Translate obio `interrupts' property value to processor IPL (see sbus.c)
* Apparently, the `interrupts' property on obio devices is just
* the processor IPL.
*/
static int intr_obio2ipl[] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
};
int
@ -120,168 +116,157 @@ obiomatch(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
register struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct mainbus_attach_args *ma = aux;
return (strcmp(cf->cf_driver->cd_name, ra->ra_name) == 0);
return (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0);
}
#if defined(SUN4)
int
obioprint(args, name)
obioprint(args, busname)
void *args;
const char *name;
const char *busname;
{
register struct confargs *ca = args;
union obio_attach_args *uoba = args;
struct obio4_attach_args *oba = &uoba->uoba_oba4;
if (ca->ca_ra.ra_name == NULL)
ca->ca_ra.ra_name = "<unknown>";
if (name)
printf("[%s at %s]", ca->ca_ra.ra_name, name);
printf(" addr %p", ca->ca_ra.ra_paddr);
printf(" addr %p pri %d", oba->oba_paddr, oba->oba_pri);
return (UNCONF);
}
#endif
void
obioattach(parent, self, args)
obioattach(parent, self, aux)
struct device *parent, *self;
void *args;
void *aux;
{
#if defined(SUN4)
if (CPU_ISSUN4)
obioattach4(parent, self, args);
#endif
#if defined(SUN4M)
if (CPU_ISSUN4M)
obioattach4m(parent, self, args);
#endif
}
struct mainbus_attach_args *ma = aux;
#if defined(SUN4)
void
obioattach4(parent, self, args)
struct device *parent, *self;
void *args;
{
/*
* There is only one obio bus
*/
if (self->dv_unit > 0) {
printf(" unsupported\n");
return;
}
printf("\n");
(void)config_search(obiosearch, self, args);
obio_bus_untmp();
}
if (CPU_ISSUN4) {
#if defined(SUN4)
/* Propagate interrupt establish function */
obio_space_tag.sparc_intr_establish =
ma->ma_bustag->sparc_intr_establish;
(void)config_search(obiosearch, self, aux);
#endif
return;
} else if (CPU_ISSUN4M) {
/*
* Attach the on-board I/O bus at on a sun4m.
* In this case we treat the obio bus as another sbus slot.
*/
struct sbus_softc *sc = &((union obio_softc *)self)->sc_sbus;
#if defined(SUN4M)
void
obioattach4m(parent, self, args)
struct device *parent, *self;
void *args;
{
register struct bus_softc *sc = (struct bus_softc *)self;
struct confargs oca, *ca = args;
register struct romaux *ra = &ca->ca_ra;
register int node0, node;
register char *name;
register const char *sp;
const char *const *ssp;
int rlen;
extern int autoconf_nzs;
static const char *const special4m[] = {
/* find these first */
"eeprom",
"counter",
static const char *const special4m[] = {
/* find these first */
"eeprom",
"counter",
#if 0 /* Not all sun4m's have an `auxio' */
"auxio",
"auxio",
#endif
"",
/* place device to ignore here */
"interrupt",
NULL
};
"",
/* place device to ignore here */
"interrupt",
NULL
};
/*
* There is only one obio bus (it is in fact one of the Sbus slots)
*/
if (self->dv_unit > 0) {
printf(" unsupported\n");
return;
}
sc->sc_bustag = ma->ma_bustag;
sc->sc_dmatag = ma->ma_dmatag;
sc->sc_intr2ipl = intr_obio2ipl;
printf("\n");
if (ra->ra_bp != NULL && strcmp(ra->ra_bp->name, "obio") == 0)
oca.ca_ra.ra_bp = ra->ra_bp + 1;
else
oca.ca_ra.ra_bp = NULL;
node = ra->ra_node;
rlen = getproplen(node, "ranges");
if (rlen > 0) {
sc->bu.scu_sbus.sc_nrange = rlen / sizeof(struct rom_range);
sc->bu.scu_sbus.sc_range =
(struct rom_range *)malloc(rlen, M_DEVBUF, M_NOWAIT);
if (sc->bu.scu_sbus.sc_range == 0)
panic("obio: PROM ranges too large: %d", rlen);
(void)getprop(node, "ranges", sc->bu.scu_sbus.sc_range, rlen);
}
/*
* Loop through ROM children, fixing any relative addresses
* and then configuring each device.
* We first do the crucial ones, such as eeprom, etc.
*/
node0 = firstchild(ra->ra_node);
for (ssp = special4m ; *(sp = *ssp) != 0; ssp++) {
if ((node = findnode(node0, sp)) == 0) {
printf("could not find %s amongst obio devices\n", sp);
panic(sp);
}
if (!romprop(&oca.ca_ra, sp, node))
continue;
sbus_translate(self, &oca);
oca.ca_bustype = BUS_OBIO;
(void) config_found(self, (void *)&oca, obioprint);
}
for (node = node0; node; node = nextsibling(node)) {
name = getpropstring(node, "name");
for (ssp = special4m ; (sp = *ssp) != NULL; ssp++)
if (strcmp(name, sp) == 0)
break;
if (sp != NULL || !romprop(&oca.ca_ra, name, node))
continue;
if (strcmp(name, "zs") == 0)
/* XXX - see autoconf.c for this hack */
autoconf_nzs++;
/* Translate into parent address spaces */
sbus_translate(self, &oca);
oca.ca_bustype = BUS_OBIO;
(void) config_found(self, (void *)&oca, obioprint);
sbus_attach(sc, "obio", ma->ma_node, ma->ma_bp, special4m);
} else {
printf("obio on this machine?\n");
}
}
#endif
int
obio_bus_probe(tag, addr, offset, size, callback, arg)
bus_space_tag_t tag;
void *addr;
int offset;
size_t size;
int (*callback) __P((void *, void *));
void *arg;
{
#if defined(SUN4)
bus_addr_t paddr = (long)addr + offset;
bus_space_handle_t bh;
caddr_t tmp;
int result;
if (sparc_bus_map(0, PMAP_OBIO, paddr, size, 0, TMPMAP_VA, &bh) != 0)
return (0);
tmp = (caddr_t)bh;
result = probeget(tmp + offset, size) != -1;
if (result && callback != NULL)
result = (*callback)(tmp, arg);
pmap_remove(pmap_kernel(), TMPMAP_VA, TMPMAP_VA+NBPG);
return (result);
#else
return (ENXIO);
#endif /*SUN4*/
}
int
obio_bus_map(tag, addr, offset, size, flags, vaddr, hp)
bus_space_tag_t tag;
void *addr;
int offset;
size_t size;
int flags;
void *vaddr;
bus_space_handle_t *hp;
{
#if defined(SUN4)
bus_addr_t paddr = (long)addr + offset;
if ((flags & OBIO_BUS_MAP_USE_ROM) != 0 &&
obio_find_rom_map(paddr, PMAP_OBIO, size, hp) == 0)
return (0);
return (sparc_bus_map(0, PMAP_OBIO, paddr, size, flags,
(vm_offset_t)vaddr, hp));
#else
return (ENXIO);
#endif /*SUN4*/
}
#if defined(SUN4)
int
obiosearch(parent, cf, args)
obio_bus_mmap(cookie, btype, paddr, flags)
void *cookie;
bus_type_t btype;
bus_addr_t paddr;
int flags;
{
return (sparc_bus_mmap(0, PMAP_OBIO, paddr, flags));
}
int
obiosearch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *args;
void *aux;
{
register struct confargs *ca = args;
struct confargs oca;
caddr_t tmp;
struct mainbus_attach_args *ma = aux;
union obio_attach_args uoba;
struct obio4_attach_args *oba = &uoba.uoba_oba4;
struct bootpath *bp;
/*
@ -298,93 +283,68 @@ obiosearch(parent, cf, args)
* XXX: We also assume that 4/[23]00 obio addresses
* must be 0xZYYYYYYY, where (Z != 0)
*/
if (cpuinfo.cpu_type == CPUTYP_4_100 &&
(cf->cf_loc[0] & 0xf0000000))
if (cpuinfo.cpu_type == CPUTYP_4_100 && (cf->cf_loc[0] & 0xf0000000))
return (0);
if (cpuinfo.cpu_type != CPUTYP_4_100 &&
!(cf->cf_loc[0] & 0xf0000000))
if (cpuinfo.cpu_type != CPUTYP_4_100 && !(cf->cf_loc[0] & 0xf0000000))
return (0);
oca.ca_ra.ra_paddr = (void *)cf->cf_loc[0];
oca.ca_ra.ra_len = 0;
oca.ca_ra.ra_nreg = 1;
oca.ca_ra.ra_iospace = PMAP_OBIO;
uoba.uoba_isobio4 = 1;
oba->oba_bustag = &obio_space_tag;
oba->oba_dmatag = ma->ma_dmatag;
oba->oba_paddr = (void *)cf->cf_loc[0];
oba->oba_pri = cf->cf_loc[1];
if (oca.ca_ra.ra_paddr)
tmp = (caddr_t)mapdev(oca.ca_ra.ra_reg, TMPMAP_VA, 0, NBPG);
bp = ma->ma_bp;
if (bp != NULL && strcmp(bp->name, "obio") == 0)
oba->oba_bp = bp + 1;
else
tmp = NULL;
oca.ca_ra.ra_vaddr = tmp;
oca.ca_ra.ra_intr[0].int_pri = cf->cf_loc[1];
oca.ca_ra.ra_intr[0].int_vec = -1;
oca.ca_ra.ra_nintr = 1;
oca.ca_ra.ra_name = cf->cf_driver->cd_name;
oba->oba_bp = NULL;
if (ca->ca_ra.ra_bp != NULL &&
strcmp(ca->ca_ra.ra_bp->name, "obio") == 0)
oca.ca_ra.ra_bp = ca->ca_ra.ra_bp + 1;
else
oca.ca_ra.ra_bp = NULL;
oca.ca_bustype = BUS_OBIO;
if ((*cf->cf_attach->ca_match)(parent, cf, &oca) == 0)
if ((*cf->cf_attach->ca_match)(parent, cf, &uoba) == 0)
return (0);
/*
* Check if XXmatch routine replaced the temporary mapping with
* a real mapping. If not, then make sure we don't pass the
* tmp mapping to the attach routine.
*/
if (oca.ca_ra.ra_vaddr == tmp)
oca.ca_ra.ra_vaddr = NULL; /* wipe out tmp address */
/*
* the match routine will set "ra_len" if it wants us to
* establish a mapping for it.
* (which won't be seen on future XXmatch calls,
* so not as useful as it seems.)
*/
if (oca.ca_ra.ra_len)
oca.ca_ra.ra_vaddr =
obio_bus_map(oca.ca_ra.ra_reg, oca.ca_ra.ra_len);
config_attach(parent, cf, &oca, obioprint);
config_attach(parent, cf, &uoba, obioprint);
return (1);
}
#define getpte(va) lda(va, ASI_PTE)
/*
* If we can find a mapping that was established by the rom, use it.
* Else, create a new mapping.
*/
void *
obio_bus_map(pa, len)
struct rom_reg *pa;
int len;
int
obio_find_rom_map(pa, iospace, len, hp)
bus_addr_t pa;
bus_type_t iospace;
int len;
bus_space_handle_t *hp;
{
#define getpte(va) lda(va, ASI_PTE)
if (CPU_ISSUN4 && len <= NBPG) {
u_long pf = (u_long)(pa->rr_paddr) >> PGSHIFT;
int pgtype = PMAP_T2PTE_4(pa->rr_iospace);
u_long va, pte;
u_long pf;
int pgtype;
u_long va, pte;
for (va = OLDMON_STARTVADDR; va < OLDMON_ENDVADDR; va += NBPG) {
pte = getpte(va);
if ((pte & PG_V) != 0 && (pte & PG_TYPE) == pgtype &&
(pte & PG_PFNUM) == pf)
return ((void *)
(va | ((u_long)pa->rr_paddr & PGOFSET)) );
/* note: preserve page offset */
}
if (len <= NBPG)
return (EINVAL);
pf = pa >> PGSHIFT;
pgtype = PMAP_T2PTE_4(iospace);
for (va = OLDMON_STARTVADDR; va < OLDMON_ENDVADDR; va += NBPG) {
pte = getpte(va);
if ((pte & PG_V) == 0 || (pte & PG_TYPE) != pgtype ||
(pte & PG_PFNUM) != pf)
continue;
/*
* Found entry in PROM's pagetable
* note: preserve page offset
*/
*hp = (bus_space_handle_t)(va | ((u_long)pa & PGOFSET));
return (0);
}
return mapiodev(pa, 0, len);
return (ENOENT);
}
#endif /* SUN4 */
void
obio_bus_untmp()
{
pmap_remove(pmap_kernel(), TMPMAP_VA, TMPMAP_VA+NBPG);
}

View File

@ -1,4 +1,4 @@
/* $NetBSD: sbus.c,v 1.18 1998/01/12 20:23:56 thorpej Exp $ */
/* $NetBSD: sbus.c,v 1.19 1998/03/21 19:55:31 pk Exp $ */
/*
* Copyright (c) 1992, 1993
@ -54,24 +54,77 @@
#include <sys/device.h>
#include <vm/vm.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <sparc/dev/sbusreg.h>
#include <sparc/dev/sbusvar.h>
int sbus_print __P((void *, const char *));
#include <sparc/sparc/iommuvar.h>
#include <machine/autoconf.h>
void sbusreset __P((int));
/* autoconfiguration driver */
void sbus_attach __P((struct device *, struct device *, void *));
int sbus_match __P((struct device *, struct cfdata *, void *));
static bus_space_tag_t sbus_alloc_bustag __P((struct sbus_softc *));
static int sbus_get_intr __P((struct sbus_softc *, int, int *));
static int sbus_bus_mmap __P((void *, bus_type_t, bus_addr_t, int));
struct cfattach sbus_ca = {
sizeof(struct sbus_softc), sbus_match, sbus_attach
/* autoconfiguration driver */
int sbus_match_mainbus __P((struct device *, struct cfdata *, void *));
int sbus_match_iommu __P((struct device *, struct cfdata *, void *));
void sbus_attach_mainbus __P((struct device *, struct device *, void *));
void sbus_attach_iommu __P((struct device *, struct device *, void *));
struct cfattach sbus_mainbus_ca = {
sizeof(struct sbus_softc), sbus_match_mainbus, sbus_attach_mainbus
};
struct cfattach sbus_iommu_ca = {
sizeof(struct sbus_softc), sbus_match_iommu, sbus_attach_iommu
};
extern struct cfdriver sbus_cd;
/* If the PROM does not provide the `ranges' property, we make up our own */
struct rom_range sbus_translations[] = {
/* Assume a maximum of 4 Sbus slots, all mapped to on-board io space */
{ 0, 0, PMAP_OBIO, SBUS_ADDR(0,0), 1 << 25 },
{ 1, 0, PMAP_OBIO, SBUS_ADDR(1,0), 1 << 25 },
{ 2, 0, PMAP_OBIO, SBUS_ADDR(2,0), 1 << 25 },
{ 3, 0, PMAP_OBIO, SBUS_ADDR(3,0), 1 << 25 }
};
/*
* Child devices receive the Sbus interrupt level in their attach
* arguments. We translate these to CPU IPLs using the following
* tables. Note: obio bus interrupt levels are identical to the
* processor IPL.
*
* The second set of tables is used when the Sbus interrupt level
* cannot be had from the PROM as an `interrupt' property. We then
* fall back on the `intr' property which contains the CPU IPL.
*/
/* Translate Sbus interrupt level to processor IPL */
static int intr_sbus2ipl_4c[] = {
0, 1, 2, 3, 5, 7, 8, 9
};
static int intr_sbus2ipl_4m[] = {
0, 2, 3, 5, 7, 9, 11, 13
};
#if 0
/* Table to translate `intr' property values to Sbus interrupt levels */
static int intr2sbus_4c[] = {
0, 1, 2, 3, -1, 4, -1, 5, 6, 7, -1, -1, -1, -1, -1
};
static int intr2sbus_4m[] = {
0, -1, 1, 2, -1, 3, -1, 4, -1, 5, -1, 6, -1, 7, -1, -1
};
#endif
#define SBUS_INTR_COMPAT 0x80000000
/*
* Print the location of some sbus-attached device (called just
* before attaching that device). If `sbus' is not NULL, the
@ -79,49 +132,70 @@ extern struct cfdriver sbus_cd;
* Return UNCONF (config_find ignores this if the device was configured).
*/
int
sbus_print(args, sbus)
sbus_print(args, busname)
void *args;
const char *sbus;
const char *busname;
{
register struct confargs *ca = args;
struct sbus_attach_args *sa = args;
if (sbus)
printf("%s at %s", ca->ca_ra.ra_name, sbus);
printf(" slot %d offset 0x%x", ca->ca_slot, ca->ca_offset);
if (busname)
printf("%s at %s", sa->sa_name, busname);
printf(" slot %d offset 0x%x", sa->sa_slot, sa->sa_offset);
if (sa->sa_pri) {
int level = sa->sa_pri;
struct sbus_softc *sc =
(struct sbus_softc *) sa->sa_bustag->cookie;
printf(" level %d", level & ~SBUS_INTR_COMPAT);
if ((level & SBUS_INTR_COMPAT) == 0) {
int ipl = sc->sc_intr2ipl[level];
if (ipl != level)
printf(" (ipl %d)", ipl);
}
}
return (UNCONF);
}
int
sbus_match(parent, cf, aux)
sbus_match_mainbus(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
register struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
struct mainbus_attach_args *ma = aux;
if (CPU_ISSUN4)
return (0);
return (strcmp(cf->cf_driver->cd_name, ra->ra_name) == 0);
return (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0);
}
int
sbus_match_iommu(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct iommu_attach_args *ia = aux;
if (CPU_ISSUN4)
return (0);
return (strcmp(cf->cf_driver->cd_name, ia->iom_name) == 0);
}
/*
* Attach an Sbus.
*/
void
sbus_attach(parent, self, aux)
sbus_attach_mainbus(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
register struct sbus_softc *sc = (struct sbus_softc *)self;
struct confargs *ca = aux;
register struct romaux *ra = &ca->ca_ra;
register int node;
register char *name;
struct confargs oca;
int rlen;
struct sbus_softc *sc = (struct sbus_softc *)self;
struct mainbus_attach_args *ma = aux;
int node = ma->ma_node;
/*
* XXX there is only one Sbus, for now -- do not know how to
@ -132,103 +206,244 @@ sbus_attach(parent, self, aux)
return;
}
sc->sc_bustag = ma->ma_bustag;
sc->sc_dmatag = ma->ma_dmatag;
/* Setup interrupt translation tables */
sc->sc_intr2ipl = CPU_ISSUN4C
? intr_sbus2ipl_4c
: intr_sbus2ipl_4m;
#if 0 /* this won't work */
sc->sc_intr_compat = CPU_ISSUN4C
? intr2sbus_4c
: intr2sbus_4m;
#endif
/*
* Record clock frequency for synchronous SCSI.
* IS THIS THE CORRECT DEFAULT??
*/
node = ra->ra_node;
sc->sc_clockfreq = getpropint(node, "clock-frequency", 25*1000*1000);
printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
sbus_attach(sc, "sbus", node, ma->ma_bp, NULL);
}
void
sbus_attach_iommu(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct sbus_softc *sc = (struct sbus_softc *)self;
struct iommu_attach_args *ia = aux;
int node = ia->iom_node;
sc->sc_bustag = ia->iom_bustag;
sc->sc_dmatag = ia->iom_dmatag;
/* Setup interrupt translation tables */
sc->sc_intr2ipl = CPU_ISSUN4C ? intr_sbus2ipl_4c : intr_sbus2ipl_4m;
#if 0 /* this won't work */
sc->sc_intr_compat = CPU_ISSUN4C ? intr2sbus_4c : intr2sbus_4m;
#endif
/*
* Record clock frequency for synchronous SCSI.
* IS THIS THE CORRECT DEFAULT??
*/
sc->sc_clockfreq = getpropint(node, "clock-frequency", 25*1000*1000);
printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
sbus_attach(sc, "sbus", node, ia->iom_bp, NULL);
}
void
sbus_attach(sc, busname, busnode, bp, specials)
struct sbus_softc *sc;
char *busname;
int busnode;
struct bootpath *bp;
const char * const *specials;
{
int node0, node, error;
const char *sp;
const char *const *ssp;
bus_space_tag_t sbt;
struct sbus_attach_args sa;
sbt = sbus_alloc_bustag(sc);
/*
* Get the SBus burst transfer size if burst transfers are supported
*/
sc->sc_burst = getpropint(node, "burst-sizes", 0);
sc->sc_burst = getpropint(busnode, "burst-sizes", 0);
if (ra->ra_bp != NULL && strcmp(ra->ra_bp->name, "sbus") == 0)
oca.ca_ra.ra_bp = ra->ra_bp + 1;
/* Propagate bootpath */
if (bp != NULL && strcmp(bp->name, busname) == 0)
bp++;
else
oca.ca_ra.ra_bp = NULL;
bp = NULL;
rlen = getproplen(node, "ranges");
if (rlen > 0) {
sc->sc_nrange = rlen / sizeof(struct rom_range);
sc->sc_range =
(struct rom_range *)malloc(rlen, M_DEVBUF, M_NOWAIT);
if (sc->sc_range == 0)
panic("sbus: PROM ranges too large: %d", rlen);
(void)getprop(node, "ranges", sc->sc_range, rlen);
/*
* Collect address translations from the OBP.
*/
error = getpropA(busnode, "ranges", sizeof(struct rom_range),
&sc->sc_nrange, (void **)&sc->sc_range);
switch (error) {
case 0:
break;
case ENOENT:
/* Fall back to our own `range' construction */
sc->sc_range = sbus_translations;
sc->sc_nrange =
sizeof(sbus_translations)/sizeof(sbus_translations[0]);
break;
default:
panic("%s: error getting ranges property", sc->sc_dev.dv_xname);
}
/*
* Loop through ROM children, fixing any relative addresses
* and then configuring each device.
* `specials' is an array of device names that are treated
* specially:
*/
for (node = firstchild(node); node; node = nextsibling(node)) {
name = getpropstring(node, "name");
if (!romprop(&oca.ca_ra, name, node))
node0 = firstchild(busnode);
for (ssp = specials ; ssp != NULL && *(sp = *ssp) != 0; ssp++) {
if ((node = findnode(node0, sp)) == 0) {
panic("could not find %s amongst %s devices",
sp, busname);
}
if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag,
node, bp, &sa) != 0) {
panic("sbus_attach: %s: incomplete", sp);
}
(void) config_found(&sc->sc_dev, (void *)&sa, sbus_print);
}
for (node = node0; node; node = nextsibling(node)) {
char *name = getpropstring(node, "name");
for (ssp = specials, sp = NULL;
ssp != NULL && (sp = *ssp) != NULL;
ssp++)
if (strcmp(name, sp) == 0)
break;
if (sp != NULL)
/* Already configured as an "early" device */
continue;
sbus_translate(self, &oca);
oca.ca_bustype = BUS_SBUS;
(void) config_found(&sc->sc_dev, (void *)&oca, sbus_print);
if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag,
node, bp, &sa) != 0) {
printf("sbus_attach: %s: incomplete\n", name);
continue;
}
(void) config_found(&sc->sc_dev, (void *)&sa, sbus_print);
}
}
void
sbus_translate(dev, ca)
struct device *dev;
struct confargs *ca;
int
sbus_setup_attach_args(sc, bustag, dmatag, node, bp, sa)
struct sbus_softc *sc;
bus_space_tag_t bustag;
bus_dma_tag_t dmatag;
int node;
struct bootpath *bp;
struct sbus_attach_args *sa;
{
struct sbus_softc *sc = (struct sbus_softc *)dev;
register int base, slot;
register int i;
struct rom_reg romreg;
int base;
int error;
if (sc->sc_nrange == 0) {
/* Old-style Sbus configuration */
base = (int)ca->ca_ra.ra_paddr;
if (SBUS_ABS(base)) {
ca->ca_slot = SBUS_ABS_TO_SLOT(base);
ca->ca_offset = SBUS_ABS_TO_OFFSET(base);
} else {
if (!CPU_ISSUN4C)
panic("relative sbus addressing not supported");
ca->ca_slot = slot = ca->ca_ra.ra_iospace;
ca->ca_offset = base;
ca->ca_ra.ra_paddr = (void *)SBUS_ADDR(slot, base);
ca->ca_ra.ra_iospace = PMAP_OBIO;
bzero(sa, sizeof(struct sbus_attach_args));
sa->sa_name = getpropstring(node, "name");
sa->sa_bustag = bustag;
sa->sa_dmatag = dmatag;
sa->sa_node = node;
sa->sa_bp = bp;
/* Fix any remaining register banks */
for (i = 1; i < ca->ca_ra.ra_nreg; i++) {
base = (int)ca->ca_ra.ra_reg[i].rr_paddr;
ca->ca_ra.ra_reg[i].rr_paddr =
(void *)SBUS_ADDR(slot, base);
ca->ca_ra.ra_reg[i].rr_iospace = PMAP_OBIO;
}
}
if ((error = getprop_reg1(node, &romreg)) != 0)
return (error);
/* We pass only the first "reg" property */
base = (int)romreg.rr_paddr;
if (SBUS_ABS(base)) {
sa->sa_slot = SBUS_ABS_TO_SLOT(base);
sa->sa_offset = SBUS_ABS_TO_OFFSET(base);
} else {
ca->ca_slot = ca->ca_ra.ra_iospace;
ca->ca_offset = (int)ca->ca_ra.ra_paddr;
/* Translate into parent address spaces */
for (i = 0; i < ca->ca_ra.ra_nreg; i++) {
int j, cspace = ca->ca_ra.ra_reg[i].rr_iospace;
for (j = 0; j < sc->sc_nrange; j++) {
if (sc->sc_range[j].cspace == cspace) {
(int)ca->ca_ra.ra_reg[i].rr_paddr +=
sc->sc_range[j].poffset;
(int)ca->ca_ra.ra_reg[i].rr_iospace =
sc->sc_range[j].pspace;
break;
}
}
}
sa->sa_slot = romreg.rr_iospace;
sa->sa_offset = base;
}
sa->sa_size = romreg.rr_len;
if ((error = sbus_get_intr(sc, node, &sa->sa_pri)) != 0)
return (error);
if ((error = getprop_address1(node, &sa->sa_promvaddr)) != 0)
return (error);
return (0);
}
int
sbus_bus_map(t, slot, offset, size, flags, vaddr, hp)
bus_space_tag_t t;
int slot, offset, size, flags;
vm_offset_t vaddr;
bus_space_handle_t *hp;
{
struct sbus_softc *sc = t->cookie;
int i;
for (i = 0; i < sc->sc_nrange; i++) {
bus_addr_t paddr;
bus_type_t iospace;
if (sc->sc_range[i].cspace != slot)
continue;
/* We've found the connection to the parent bus */
paddr = sc->sc_range[i].poffset + offset;
iospace = sc->sc_range[i].pspace;
return (bus_space_map2(sc->sc_bustag, iospace, paddr,
size, flags, vaddr, hp));
}
return (EINVAL);
}
int
sbus_bus_mmap(cookie, btype, paddr, flags)
void *cookie;
bus_type_t btype;
bus_addr_t paddr;
int flags;
{
int slot = (int)btype;
int offset = (int)paddr;
struct sbus_softc *sc = cookie;
int i;
for (i = 0; i < sc->sc_nrange; i++) {
bus_addr_t paddr;
bus_addr_t iospace;
if (sc->sc_range[i].cspace != slot)
continue;
paddr = sc->sc_range[i].poffset + offset;
iospace = (bus_addr_t)sc->sc_range[i].pspace;
return (bus_space_mmap(sc->sc_bustag, iospace, paddr, flags));
}
return (-1);
}
/*
* Each attached device calls sbus_establish after it initializes
* its sbusdev portion.
@ -284,3 +499,103 @@ sbusreset(sbus)
}
}
}
/*
* Get interrupt attributes for an Sbus device.
*/
int
sbus_get_intr(sc, node, ip)
struct sbus_softc *sc;
int node;
int *ip;
{
struct rom_intr *rip;
int *ipl;
int n;
/*
* The `interrupts' property contains the Sbus interrupt level.
*/
ipl = NULL;
if (getpropA(node, "interrupts", sizeof(int), &n, (void **)&ipl) == 0) {
*ip = ipl[0];
free(ipl, M_DEVBUF);
return (0);
}
/*
* Fall back on `intr' property.
*/
rip = NULL;
switch (getpropA(node, "intr", sizeof(*rip), &n, (void **)&rip)) {
case 0:
*ip = (rip[0].int_pri & 0xf) | SBUS_INTR_COMPAT;
free(rip, M_DEVBUF);
return (0);
case ENOENT:
*ip = 0;
return (0);
}
return (-1);
}
/*
* Install an interrupt handler for an Sbus device.
*/
void *
sbus_intr_establish(cookie, level, flags, handler, arg)
void *cookie;
int level;
int flags;
int (*handler) __P((void *));
void *arg;
{
struct sbus_softc *sc = cookie;
struct intrhand *ih;
int ipl;
ih = (struct intrhand *)
malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT);
if (ih == NULL)
return (NULL);
if ((flags & BUS_INTR_ESTABLISH_SOFTINTR) != 0)
ipl = level;
else if ((level & SBUS_INTR_COMPAT) != 0)
ipl = level & ~SBUS_INTR_COMPAT;
else
ipl = sc->sc_intr2ipl[level];
ih->ih_fun = handler;
ih->ih_arg = arg;
if ((flags & BUS_INTR_ESTABLISH_FASTTRAP) != 0)
intr_fasttrap(ipl, (void (*)__P((void)))handler);
else
intr_establish(ipl, ih);
return (ih);
}
static bus_space_tag_t
sbus_alloc_bustag(sc)
struct sbus_softc *sc;
{
bus_space_tag_t sbt;
sbt = (bus_space_tag_t)
malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
if (sbt == NULL)
return (NULL);
bzero(sbt, sizeof *sbt);
sbt->cookie = sc;
#if notyet
sbt->sparc_bus_map = _sbus_bus_map;
#endif
sbt->sparc_bus_mmap = sbus_bus_mmap;
sbt->sparc_intr_establish = sbus_intr_establish;
return (sbt);
}