In npxdna(), if there was an exception state in the FPU but npxproc was
null, the frstor would fault on a PPro. I'm pretty sure this is not how the chip is supposed to behave, but it's easy enough to do a fninit to throw away the exception state. Also, some other minor changes to the documentation.
This commit is contained in:
mycroft
parent
bd31517508
commit
919340aaa5
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@ -1,4 +1,4 @@
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/* $NetBSD: npx.c,v 1.65 1998/02/10 14:11:26 mrg Exp $ */
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/* $NetBSD: npx.c,v 1.66 1998/03/20 20:15:14 mycroft Exp $ */
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#if 0
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#define IPRINTF(x) printf x
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@ -7,7 +7,7 @@
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#endif
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/*-
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* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1994, 1995, 1998 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1990 William Jolitz.
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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@ -388,21 +388,33 @@ npxintr(arg)
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if (p == 0 || npx_type == NPX_NONE) {
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printf("npxintr: p = %p, curproc = %p, npx_type = %d\n",
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p, curproc, npx_type);
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panic("npxintr from nowhere");
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panic("npxintr: came from nowhere");
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}
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/*
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* Clear the interrupt latch.
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*/
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outb(0xf0, 0);
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/*
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* If we're saving, ignore the interrupt. The FPU will happily
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* generate another one when we restore the state later.
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* If we're saving, ignore the interrupt. The FPU will generate
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* another one when we restore the state later.
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*/
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if (npx_nointr != 0)
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return (1);
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#ifdef DIAGNOSTIC
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/*
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* Find the address of npxproc's savefpu. This is not necessarily
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* the one in curpcb.
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* At this point, npxproc should be curproc. If it wasn't, the TS bit
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* should be set, and we should have gotten a DNA exception.
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*/
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if (p != curproc)
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panic("npxintr: wrong process");
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#endif
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/*
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* Find the address of npxproc's saved FPU state. (Given the invariant
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* above, this is always the one in curpcb.)
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*/
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addr = &p->p_addr->u_pcb.pcb_savefpu;
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/*
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@ -428,10 +440,9 @@ npxintr(arg)
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addr->sv_ex_tw = addr->sv_env.en_tw;
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/*
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* Pass exception to process. If it's the current process, try to do
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* it immediately.
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* Pass exception to process.
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*/
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if (p == curproc && USERMODE(frame->if_cs, frame->if_eflags)) {
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if (USERMODE(frame->if_cs, frame->if_eflags)) {
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/*
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* Interrupt is essentially a trap, so we can afford to call
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* the SIGFPE handler (if any) as soon as the interrupt
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@ -456,18 +467,13 @@ npxintr(arg)
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trapsignal(p, SIGFPE, code);
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} else {
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/*
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* Nested interrupt. These losers occur when:
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* o an IRQ13 is bogusly generated at a bogus time, e.g.:
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* o immediately after an fnsave or frstor of an
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* error state.
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* o a couple of 386 instructions after
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* "fstpl _memvar" causes a stack overflow.
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* These are especially nasty when combined with a
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* trace trap.
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* o an IRQ13 occurs at the same time as another higher-
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* priority interrupt.
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* This is a nested interrupt. This should only happen when
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* an IRQ13 occurs at the same time as a higher-priority
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* interrupt.
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*
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* Treat them like a true async interrupt.
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* XXX
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* Currently, we treat this like an asynchronous interrupt, but
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* this has disadvantages.
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*/
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psignal(p, SIGFPE);
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}
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@ -476,9 +482,11 @@ npxintr(arg)
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}
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/*
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* Wrapper for fnsave instruction to handle h/w bugs. If there is an error
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* pending, then fnsave generates a bogus IRQ13 on some systems. Force any
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* IRQ13 to be handled immediately, and then ignore it.
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* Wrapper for the fnsave instruction. We set the TS bit in the saved CR0 for
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* this process, so that it will get a DNA exception on the FPU instruction and
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* force a reload. This routine is always called with npx_nointr set, so that
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* any pending exception will be thrown away. (It will be caught again if/when
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* the FPU state is restored.)
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*
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* This routine is always called at spl0. If it might called with the NPX
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* interrupt masked, it would be necessary to forcibly unmask the NPX interrupt
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@ -487,14 +495,11 @@ npxintr(arg)
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static inline void
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npxsave1()
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{
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register struct pcb *pcb;
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struct proc *p = npxproc;
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npx_nointr = 1;
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pcb = &npxproc->p_addr->u_pcb;
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fnsave(&pcb->pcb_savefpu);
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pcb->pcb_cr0 |= CR0_TS;
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fnsave(&p->p_addr->u_pcb.pcb_savefpu);
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p->p_addr->u_pcb.pcb_cr0 |= CR0_TS;
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fwait();
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npx_nointr = 0;
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}
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/*
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@ -508,7 +513,6 @@ int
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npxdna(p)
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struct proc *p;
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{
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u_short cw;
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if (npx_type == NPX_NONE) {
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IPRINTF(("Emul"));
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@ -523,30 +527,27 @@ npxdna(p)
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p->p_addr->u_pcb.pcb_cr0 &= ~CR0_TS;
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clts();
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if ((p->p_md.md_flags & MDP_USEDFPU) == 0) {
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/*
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* Initialize the FPU state to clear any exceptions. If someone else
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* was using the FPU, save their state (which does an implicit
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* initialization).
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*/
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npx_nointr = 1;
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if (npxproc != 0 && npxproc != p) {
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IPRINTF(("Save"));
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npxsave1();
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} else {
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IPRINTF(("Init"));
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cw = p->p_addr->u_pcb.pcb_savefpu.sv_env.en_cw;
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if (npxproc != 0 && npxproc != p)
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npxsave1();
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else {
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npx_nointr = 1;
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fninit();
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fwait();
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npx_nointr = 0;
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}
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npxproc = p;
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fldcw(&cw);
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fninit();
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fwait();
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}
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npx_nointr = 0;
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npxproc = p;
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if ((p->p_md.md_flags & MDP_USEDFPU) == 0) {
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fldcw(&p->p_addr->u_pcb.pcb_savefpu.sv_env.en_cw);
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p->p_md.md_flags |= MDP_USEDFPU;
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} else {
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if (npxproc != 0) {
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#ifdef DIAGNOSTIC
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if (npxproc == p)
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panic("npxdna: same process");
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#endif
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IPRINTF(("Save"));
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npxsave1();
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}
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npxproc = p;
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/*
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* The following frstor may cause an IRQ13 when the state being
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* restored has a pending error. The error will appear to have
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@ -572,10 +573,11 @@ npxdna(p)
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void
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npxdrop()
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{
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struct proc *p = npxproc;
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stts();
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npxproc->p_addr->u_pcb.pcb_cr0 |= CR0_TS;
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npxproc = 0;
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stts();
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p->p_addr->u_pcb.pcb_cr0 |= CR0_TS;
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}
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/*
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@ -584,8 +586,8 @@ npxdrop()
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* The FNSAVE instruction clears the FPU state. Rather than reloading the FPU
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* immediately, we clear npxproc and turn on CR0_TS to force a DNA and a reload
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* of the FPU state the next time we try to use it. This routine is only
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* called when forking or core dump, so this algorithm at worst forces us to
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* trap once per fork(), and at best saves us a reload once per fork().
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* called when forking or core dumping, so the lazy reload at worst forces us
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* to trap once per fork(), and at best saves us a reload once per fork().
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*/
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void
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npxsave()
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@ -597,7 +599,9 @@ npxsave()
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#endif
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IPRINTF(("Fork"));
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clts();
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npx_nointr = 1;
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npxsave1();
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stts();
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npx_nointr = 0;
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npxproc = 0;
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stts();
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}
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