lpt{open,close,write,ioctl} prototypes.
* Remove the cdev_decl(lpt). We get it from machine/conf.h.
* Add and use LPTSOFTC.
* Use level triggered interrupts (seems to work with less spurious interrupts).
* Do not use NLPT. Use lpt_cd.cd_ndevs to get the number of lpt devices.
* ether_ifattach now needs the ethernet address of the device. Supply a
dummy address.
* Include arp.h instead of ether.h.
* Remove softnet prototype. It is in cpu.h now.
* Remove calls to intr_init and intr_establish for softclock and softnet.
This is done in the mainbus attach routine now.
* Remove impintr. This seems to be dead.
* Add natmintr :-)
* Use machine/conf.h not sys/conf.h to get the prototypes for the
scn cdev functions.
* Include <sys/kgdb.h> to get prototypes for kgdb_connect and kgdb_attach.
* Add missing prototypes for some functions.
* Make ddb work before the console was opend. Thank's to Ian Dall
for this change. His comment:
Also, ddb doesn't work if a break is set before the console
is opened. That is because DTR and RTS are not asserted. It
would probably work if the console is wired to ingnore DTR
or RTS. The change below is probably not very correct.
Proabably the state of DTR and RTS should be saved and DTR
and RTS asserted on the start of a polled serial input and
the saved values restored on exiting polled input
* Remove unused function scn_ei.
* Add prototype for ncr_ready.
* Add ncr_wait_not_req function from Ian Dall:
The ncr_wait_not_req business is to avoid a potential race.
When the pseudo DMA finishes, the target may not have
lowered REQ yet. If we just charge ahead, we eventually test
for phase when REQ is high. However, if REQ has not yet gone
low for the last byte transferred, this will be the wrong
phase. This is taken from the dp8490 application notes. The
last ACK is not deasserted until the dma is completed.
Deasserting the last ACK should be delayed until the last
REQ is deasserted. I am not sure if there are ever devices
this slow, but I believe the code is "more correct".
* Add missing prototypes.
* Move over softnet() from intr.c.
* Establish softnet and softclock interrupts in init532.
* Misc cleanup to get it compiled with the new CWARNFLAGS.
of the ICU in clock_attach.
* Pull over (and reformat) rtc_rw from mem.c.
* Convert the rtc driver to use /sys/dev/clock_subr.c (partially by
stealing code from the sun3 port).
Some of the stuff (e.g., rarpd, bootpd, dhcpd etc., libsa) still will
only support Ethernet. Tcpdump itself should be ok, but libpcap needs
lot of work.
For the detailed change history, look at the commit log entries for
the is-newarp branch.
* Uses Counter/Timer dynamicly for rate generation; You can
have both 19200 and 38400 on one duart, and 57600 on another!
* Improved scninfo program to dump driver internal information.
implemented counters for parity err, framing err, break
* Delays changes until transmitter idle to avoid "glitches"
* Cleaned up scn_softc member names
* Untested support for sc26c92 (I don't yet have any to test with);
+ Will use alternate rate tables (include 115.2kbps and 230.4kbps)
+ Will raise FIFO rx interrupt threshold and watchdog timer
at higher rates.
+ Unknown (to me) how fast pc532 MC145406 driver chips can go
NOTE: It seems like it may be a BAD idea to use a sc26c92 as
a console port for now; the PROM doesn't know to reset the
chip back to scn2692 mode!!
thorpej