backend.
The VME2chip can use this to translate a VMEbus irq to a cpu irq.
The VMEchip (on mvme147) can't deal with the VMEbus irq and cpu irq
being different so we just panic in that case for now.
respond in the allotted time if they're told to TALK immediately after
completing a LISTEN command. Experimentation with adb_op_sync() yielded
consistent results when the timeout was increased from the documented
6900 usec to 8000 usec, so we'll make that change here.
(Accurate and complete documentation of the hardware sure would help...)
and a front-end driver for the Ether3. Only semantic change is to remove
ea_claimirq() and ea_releaseirq() on the grounds that the seem too spurious
to warrant a callback to the front-end.
in the MIPS prom loader we have to be very careful how the sections are
ordered and the number of sections defined. For this reason the standard
linker scripts cannot be used.
The exact rules don't appear to be documented and a little experimentation
is required.
and alpha ports.
Uses PROM standalone I/O functions but due to the lack of a lseek function
it currently only works with version 5.40 of the firmware. A more portable
solution is being worked on.
installboot utility requires several changes in order to correctly install
the bootstrap code - there is a "volume directory" which contains a list
of filenames, start sectors and length. We need to add a "boot" entry of
the correct length starting at block 2. The boot file has to be ecoff
which means we waste another 0.5k
Normally the Mips filesystem has a ~500k partition for this purpose but it
should be possible to squeeze it all into the first 7k "BSD Style" (1k is
required for 2 different copies of the partition table)
Only the bootxx_ffs first stage bootstrap has been tested via bootp() which
loads the second stage off disk and then boots the kernel.
in syscall() anymore. By defition, processor was in SR_INT_IE turn
on prior to have syscall exception. MIPS1 assembler hook arranges
to enable the bit for its own. MIPS3 does the same effect by
turning off EXL bit.
fact the direct mapped cache makes address alias effect.
- Just turn on processor master interrupt mask IEc (SR_INT_IE) bit prior
to call syscall() kernel entry point. IEp is always 1 in this case
by defition.
and data cache sizes). R4000 uses 2^(12+IC) and 2^(12+DC). IDT32364
uses 2^(9+IC) and 2^(9+DC).
abstract around the problem by making the base a parameter to the
MIPS3_CONFIG_CACHE_SIZE macro. we pass the base down from mips_vector_init
to mips3_vector_init and to mips3_ConfigCache (where it is used).
XXX: someone with an MIPS3_4100 should switch to this and get rid
of the ugly ifdefs in cpuregs.h
- Don't fall into infinite loop even if the # of iteration necessary isn't 1.
- Don't interpret lower 8bit of AL, which is # of iteration, as a descriptor.
w/ Chuq Silvers. Fixes a panic when a program with wired pages that
has run for a long time when the system is under heavy memory load
exits (specific case was ntpd, reported by Simon Burge).
