simonb
4d304073f1
Add some ifdef's around the usage of mips_wait_idle; fixes builds for
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playstations2 and MIPS1-only kernels.
Based on patch from Bill Squier.
2002-06-07 02:05:22 +00:00
simonb
e36c88d696
Introduce CHIP_ACCESSTYPE which (if defined) is used as the type for
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performing the accesses, regardless of the size of the data type
requested. Useful for chips which require fixed-width accesses to all
registers.
Cast arguments printed using %lx to u_long all the time, not just
sometimes.
Include a few extra files here so they don't need to be included by the
files that include this one.
2002-06-05 06:27:10 +00:00
simonb
8492ceb1ff
White space nits.
2002-06-05 06:09:28 +00:00
simonb
db50a069f8
Remove an ELF-related comment that isn't needed any more.
2002-06-05 06:02:52 +00:00
simonb
2100183aff
For the CP0 status register bit definitions- add the MX, PX and NMI bits
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and rename TLB_SHUTDOWN and SOFT_RESET to TS and SR (the abbreviations
in the MIPS documentation).
XXX: this file really needs to be cleaned up one day...
2002-06-05 05:56:48 +00:00
thorpej
04076e5943
Make this work with an ISO C preprocessor.
2002-06-04 21:44:40 +00:00
thorpej
d941ddfee0
Don't use -traditional-cpp if HAVE_GCC3.
2002-06-04 21:39:09 +00:00
simonb
f4e42e7eb6
Add an extremely rough SMBus handler and RTC driver. This will be
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cleaned up significantly when we have an MI SMBus framework, but at
least we can see the RTC on the swarm now.
2002-06-04 08:32:41 +00:00
simonb
9cc65a96d0
3 ports are now using the reciprocal count divisor code now, move it
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to <mips/cpu.h>, and add MIPS_SET_CI_RECIPRICAL and MIPS_COUNT_TO_MHZ
macros to use it.
2002-06-04 05:42:41 +00:00
simonb
8b4906e391
Add prototypes for the 64-bit pagezero functions.
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Bracket some function prototypes with #ifdef/#endif.
2002-06-03 01:51:05 +00:00
drochner
d2b9876081
move initialization of the "struct pglist" returned by uvm_pglistalloc()
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from the calling code into uvm_pglistalloc() itself for consistency
and easier error handling
2002-06-02 14:44:35 +00:00
simonb
4cb13fbec6
There's two SMBuses in the BCM1250; list them both on the on-board device
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list.
Get rid of some magic numbers.
2002-06-01 13:56:56 +00:00
simonb
51a91ebabb
KNF; make some function static; other minor cleanups.
2002-06-01 13:55:48 +00:00
simonb
1e10b4d4ad
Split USE_64BIT_FUNCTIONS into USE_64BIT_INSTRUCTIONS and
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USE_64BIT_CP0_FUNCTIONS.
Add 64-bit pagezero function.
2002-06-01 13:52:23 +00:00
simonb
341ed8c0d3
Use CPU_MIPS_USE_WAIT and CPU_MIPS_NO_WAIT in the CPU table, and use
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the generic name "mips_wait_idle" for the old function that had both
rm52xx_idle and mipsNN_idle entry points.
2002-06-01 13:45:45 +00:00
simonb
3611959ac8
Remove some unnecessary nops after some mfc0's.
2002-06-01 13:16:44 +00:00
simonb
cf5f852d1c
Standardise on the name "MIPS_SR_BEV" instead of a couple of different
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#defines for the same status bit.
2002-06-01 12:27:03 +00:00
simonb
5b5cc1ebb8
Add two new cpu capability flags: CPU_MIPS_USE_WAIT for CPUs that use a
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"wait" instruction based cpu_idle(), and CPU_MIPS_NO_WAIT for specific
CPUs that don't use this (applicable to mips32/64 mainly).
2002-06-01 12:10:45 +00:00
simonb
d75c18b050
Use the current MIPS in_cksum for in4_cksum too.
2002-06-01 11:41:33 +00:00
thorpej
80f6433965
Fix printf format issues.
2002-05-31 21:09:03 +00:00
thorpej
dada8613e1
Let machine-dependent code specify how to enumerate the bus.
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Currently, everyone uses pci_enumerate_bus_generic().
2002-05-15 19:23:51 +00:00
simonb
ada33c9eac
Oops, remove an #endif leftover from the previous change.
2002-05-13 06:11:52 +00:00
simonb
c790dd34b6
Add a comment after an #endif to match up with an #ifdef.
2002-05-13 04:15:40 +00:00
simonb
ee2264c945
All MIPS ports have been ELF for a long time (most since they were
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created); remove non-ELF assembly support.
2002-05-13 01:39:17 +00:00
rafal
13c470a169
R4600 and R5000 count registers count at half-cpu-speed as well.
2002-05-03 03:50:11 +00:00
simonb
fa61e6cd3b
In the LOCKDEBUG case, call exit2() before sched_lock_idle() so
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that the exitting process pointer in a0 doesn't get overwritten by
sched_lock_idle().
2002-04-25 06:55:53 +00:00
manu
33d1091e95
Removed the IRIX signal trampoline, which is useless now we use the signal
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trampoline provided by IRIX libc.
2002-04-14 21:52:25 +00:00
manu
c56e133974
More comments on the new signal frame/trampoline
2002-04-13 10:52:59 +00:00
manu
5ee554064d
Reworked IRIX signal delivery so that ucontext is used instead of sigcontext
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when SA_SIGINFO is used. The IRIX process will hence find the expected
information using the third argument of the signal handler.
We do not provide code and siginfo yet.
2002-04-12 18:44:57 +00:00
manu
79166f2808
iAdded warning printtf just in case something calls the stubs functions here
2002-04-06 18:03:17 +00:00
simonb
2d7c87ebfb
Add a "CPU_MIPS_DOUBLE_COUNT" flag for CPUs where the cp0 count register
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ticks over at half the CPU clock speed, and set this flag for the known
CPUs with this behaviour. Better names for this flag gratefully accepted!
Also adjust comment about known R4000/R4400 revisions.
2002-04-05 01:22:16 +00:00
simonb
fab269a0eb
Backout the .sdata to .data change for now; this broke compiling of
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hpcmips kernels.
2002-04-03 13:57:47 +00:00
simonb
2548187935
Don't make arch/mips/mips/mips_mcclock.c mandatory for all mips ports
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with an mcclock - pmax is the only one currently using this.
2002-04-03 13:16:13 +00:00
simonb
ccc73cca48
Put a couple of variables in the data section, not the sdata section.
2002-04-03 04:04:31 +00:00
simonb
6fbaedb430
Use the new 2way mips{32,64} cache ops.
2002-04-03 03:55:07 +00:00
simonb
67fd901d75
Include 2way cache ops for mips{32,64} CPUs.
2002-04-03 03:51:00 +00:00
simonb
078e9477f0
Add prototype for badaddr64().
2002-04-03 03:48:33 +00:00
simonb
85c30a703d
Remove a commented-out debug printf.
2002-04-03 03:47:53 +00:00
manu
5f93fe2017
undef SYSCALL_SHIFT after using it so that it is possible to define both
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COMPAT_IRIX and COMPAT_LINUX without getting warnings about SYSCALL_SHIFT
being redefined.
2002-04-01 21:06:21 +00:00
manu
2e2ba05d0d
Moved errno translation so that errno get translated correctly in any case,
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and so that EJUSTRETURN and ERESTART get proprely reported.
2002-03-28 18:48:31 +00:00
simonb
4a1086db83
There's 8 interrupt_status_N registers, not 7.
2002-03-28 12:49:55 +00:00
simonb
de2d1df3a9
Remove the comment that says this is for PCI busses only.
2002-03-23 14:20:41 +00:00
simonb
8e5ab10b05
Add generic chipset memory and I/O "bus" functions for mips, based on
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algor/pci/pci_alignstride_bus_{io,mem}_chipdep.c.
2002-03-23 14:19:18 +00:00
chs
fb88d3b0ba
add missing cache flushes in pmap_protect(). fixes PR 15965.
2002-03-20 02:50:19 +00:00
simonb
267b8c65f5
Define all CPU types if _LKM is defined; fixes problems building LKM's
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as noted by FUKAUMI Naoki on port-mips.
2002-03-19 00:53:46 +00:00
simonb
91785659ba
Generic PCI/ISA machdep headers for mips; copied from the algor port.
2002-03-18 03:08:09 +00:00
simonb
7e2ca5e1a8
Copy the algor bus_dma.c for use as a generic bus_dma implementation for
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other MIPS ports.
2002-03-18 02:32:54 +00:00
simonb
e64d2d9708
Oops, balance #ifdef/#endif _KERNEL.
2002-03-18 01:01:54 +00:00
simonb
d9aac5ef07
Add generic MIPS bus_space and bus_dma headers; these are a straight
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split of the algor <machine/bus.h>.
2002-03-18 00:32:21 +00:00
manu
c51e325123
Replaced PS_STRINGS by p->p_psstr
2002-03-17 20:54:09 +00:00