Robert Xiao b041345a73 Fix RISCV test_riscv32_fp_move test ... RISCV FP registers are 64-bit in size, even in 32-bit mode, because they can hold doubles. The test even uses the double-precision instruction fmv.d. Thus, the reads should be reading 64-bit registers.		2023-06-16 15:23:43 -07:00
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fuzz	Sync with dev branch	2022-01-18 21:39:45 +01:00
regress	Add a test to make sure VEX.L stops emulation with an error	2022-07-20 13:59:27 +02:00
rust-tests	rust add tlb callback	2023-04-05 18:57:22 +02:00
unit	Fix RISCV test_riscv32_fp_move test	2023-06-16 15:23:43 -07:00