Robert Xiao
b041345a73
Fix RISCV test_riscv32_fp_move test
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RISCV FP registers are 64-bit in size, even in 32-bit mode, because they can
hold doubles. The test even uses the double-precision instruction fmv.d. Thus,
the reads should be reading 64-bit registers.
2023-06-16 15:23:43 -07:00
Robert Xiao
d7a806c026
Reformat code with format.sh
2023-06-16 15:23:41 -07:00
Takacs, Philipp
073c4b74ca
load_helper only call cpu_loop_exit() when emulation is running
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The load_helper is sometimes called from register writes. When the load
fails check if emulation is running before jump out of the emulated code.
2023-05-09 14:58:40 +02:00
lazymio
bde3cd7dae
Merge pull request #1812 from ks0777/ctl_rust
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add rust bindings for uc_ctl
2023-04-24 16:25:34 +02:00
Mio
bbbc7856ac
Invalidate tb cache once mapping is removed
2023-04-12 20:56:54 +08:00
Philipp Takacs
a9f0dabc64
rust add tlb callback
2023-04-05 18:57:22 +02:00
Takacs, Philipp
8b2c477578
clear the TLB cache in uc_ctl_flush_tlb
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uc_ctl_flush_tlb implies that the tlb is flushed. This change adds
UC_CTL_TLB_FLUSH which clears the TLB and set the uc_ctl_flush_tlb
alias to UC_CTL_TLB_FLUSH. Also adds a uc_ctl_flush_tb alias for
UC_CTL_TB_FLUSH.
2023-03-28 14:11:41 +02:00
Takacs, Philipp
e96ac42b2e
Remove MMU hacks
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Unicorn has included some ugly hacks to provide a envirement where vaddr == paddr.
These hacks where to use the full 64 bit mappings on x86 without init the mmu
and some memory redirect for MIPS.
The UC_TLB_CPU mode defaults to vaddr == paddr, therfor these hacks aren't
required anymore.
2023-03-28 14:02:17 +02:00
Takacs, Philipp
e25419bb2d
add virtuall tlb
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this virtuall tlb allows to use mmu indipendent of the architectur
2023-03-28 13:50:11 +02:00
Takacs, Philipp
7f1eb4532d
add basic mmu tests
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Some simple tests for diffrent mmu.
Basicly add some tlb entries, enable the mmu try to read from virtual address
The aarm64 test was provided by imre-kis-arm in #1718
2023-03-28 13:50:11 +02:00
lazymio
5e2074da6a
Merge pull request #1808 from kallisti5/haiku-fix-2023
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build: Fixes for Haiku
2023-03-26 12:17:23 +08:00
Alexander von Gluck IV
d504e3a004
build: Fixes for Haiku
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* Haiku is fully posix, so can be lumped together with most unix cases
2023-03-22 13:58:10 -05:00
mio
11fcbad9ff
Remove redundant printf
2023-03-12 20:28:01 +01:00
Takacs, Philipp
b7b1a4d6b4
difference between stop_request and quit_request
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quit_request is for internal use. This means the IP register was updated and
qemu needs to rebuild the translation blocks.
stop_request is set by the user (uc_emu_stop) to indecate that unicorn sould
stop emulating.
2023-03-07 14:38:49 +01:00
mio
133504b504
Fix wrong IP in x86_16 because of cs_base not substracted
2023-02-20 20:21:56 +01:00
mio
e9c1c17f6d
Fix endianess detection
2022-11-16 15:16:49 +01:00
mio
fc193ffe24
Fix missing macros
2022-10-28 17:55:39 +02:00
mio
a40bf26263
Disable test_x86_unaligned_access on be hosts
2022-10-28 17:53:20 +02:00
mio
428ed8fd21
Fix test_x86_unaligned_access for big endian hosts
2022-10-28 17:47:55 +02:00
mio
4b961a8ef6
Apply fix for big endian hosts per #1710
2022-10-28 16:20:20 +02:00
mio
47275c18f4
Fix a test bug
2022-10-28 15:02:59 +02:00
mio
d80cd54b0f
Revert test_ctl endian changes
2022-10-27 23:39:43 +02:00
mio
bb7b5bb64a
Use macro bswap
2022-10-27 23:32:15 +02:00
mio
e01556557e
Fix endianess in test_ctl
2022-10-27 22:52:25 +02:00
mio
fb8fb1ca7a
Add headers for endianess
2022-10-27 22:51:56 +02:00
mio
da3999b6f0
Add tests for thumb2
2022-10-21 11:37:07 +02:00
mio
3ea7857be3
Exit early when invalid read happens
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In this way, the target register won't be overwritten
2022-10-20 21:57:28 +02:00
mio
a5d4d30a31
Sync PC for mem ldst on aarch64
2022-10-20 21:19:18 +02:00
Nguyen Anh Quynh
b99ec09c90
tests: remove unused var
2022-10-12 14:43:01 +08:00
mio
c144f06145
Format code
2022-10-01 00:14:08 +02:00
mio
19d8876e23
Deep copy for arm cpu state
2022-10-01 00:14:08 +02:00
relapids
1065c2dff4
Fix test_uc_hook_cached_uaf for MacOS M1 (aarch64).
2022-09-25 15:24:56 -07:00
Timo Röhling
e1e7b25268
Adjust big memory test for host pagesize
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On machines with a page size larger than 4K, the requested memory size
in `test_map_big_memory` gets rounded up and overflows to zero.
This PR adds some code to query the page size and adjust the requested
memory size accordingly.
2022-09-25 18:16:06 +02:00
Mio
a0e119c6f0
Format code
2022-08-31 23:27:24 +08:00
Mio
c4a0813f4a
Add a test for infinite loop when sync-ing pc for UC_HOOL_BLOCK #1661
2022-08-31 23:27:05 +08:00
relapids
154a21d6a3
Disable ARM-specific tests when ARM is unavailable.
2022-08-18 18:29:24 -07:00
relapids
2e8986174b
Fix leak in test_mem_protect_map_ptr.
2022-08-15 05:38:29 -07:00
mio
bdb141aeef
Disable unaligned access test on ppc and aarch64
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The memoy read operations on these architectures are inlined
e.g. ldur on aarch64
2022-08-14 15:42:37 +02:00
mio
419d710c4a
Return true when we handled the memory events
2022-08-14 13:37:25 +02:00
mio
2c00546c6e
Merge rhelmot's fix
2022-08-14 13:35:54 +02:00
mio
6db6790ec2
Merge remote-tracking branch 'zachesez/ppc_cr_read_fix' into dev
2022-07-23 20:46:40 +08:00
Mio
d6d57834b0
Format code
2022-07-23 19:27:37 +08:00
Mio
c7ff9d66cf
Move vex.l test to test_x86
2022-07-23 19:26:35 +08:00
Zach Szczesniak
2b25867e4b
Fixed endianness when writing PPC32 CR register.
2022-07-20 18:31:13 -04:00
Duncan Ogilvie
e485f39846
Add a test to make sure VEX.L stops emulation with an error
2022-07-20 13:59:27 +02:00
lazymio
0ebac3b455
Fix typo
2022-06-02 15:06:50 +02:00
lazymio
6d61aec82f
Format code
2022-06-02 14:46:26 +02:00
lazymio
637dc8a8a0
Generate an extra block to trigger segfault
2022-06-02 14:45:38 +02:00
lazymio
40436e885b
Fix the cached hook test
2022-06-02 14:38:53 +02:00
lazymio
774c942143
Add a test for hook cache UAF
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If a hook is deleted but wrongly cached, a UAP is probably triggered
2022-06-01 23:58:02 +02:00
