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b041345a73
unicorn/tests/unit
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Robert Xiao b041345a73 Fix RISCV test_riscv32_fp_move test 
RISCV FP registers are 64-bit in size, even in 32-bit mode, because they can
hold doubles. The test even uses the double-precision instruction fmv.d. Thus,
the reads should be reading 64-bit registers.
2023-06-16 15:23:43 -07:00
..
acutest.h Reformat code with format.sh 2023-06-16 15:23:41 -07:00
endian.h Reformat code with format.sh 2023-06-16 15:23:41 -07:00
test_arm64.c Reformat code with format.sh 2023-06-16 15:23:41 -07:00
test_arm.c Apply fix for big endian hosts per #1710 2022-10-28 16:20:20 +02:00
test_ctl.c Reformat code with format.sh 2023-06-16 15:23:41 -07:00
test_m68k.c fix rust bindings build on windows (#1584) 2022-04-16 13:40:04 +02:00
test_mem.c Apply fix for big endian hosts per #1710 2022-10-28 16:20:20 +02:00
test_mips.c Apply fix for big endian hosts per #1710 2022-10-28 16:20:20 +02:00
test_ppc.c Fixed endianness when writing PPC32 CR register. 2022-07-20 18:31:13 -04:00
test_riscv.c Fix RISCV test_riscv32_fp_move test 2023-06-16 15:23:43 -07:00
test_s390x.c fix rust bindings build on windows (#1584) 2022-04-16 13:40:04 +02:00
test_sparc.c Add clang-format and format code to qemu code style 2021-10-29 12:44:49 +02:00
test_tricore.c TriCore Support (#1568) 2022-04-29 23:11:34 +02:00
test_x86.c Reformat code with format.sh 2023-06-16 15:23:41 -07:00
unicorn_test.h Reformat code with format.sh 2023-06-16 15:23:41 -07:00