Commit Graph

3094 Commits

Author SHA1 Message Date
mio
d568885d64
Re-add muls_wheel.sh
Thanks to @Antelox

Co-authored-by: @Antelox <anteloxrce@gmail.com>
2024-09-26 19:15:03 +08:00
mio
050f2fbcaf
temp remove 2024-09-26 19:13:57 +08:00
mio
9e0addd682
Still add plat-name for Linux 2024-09-26 19:11:53 +08:00
mio
2ccdc08237
Fix musl build script 2024-09-26 18:47:20 +08:00
mio
867770c7ef
Tag and release 2.1.1 2024-09-26 18:44:51 +08:00
mio
4fa34d43ef
Fix arm64 wheel
93542c397c/cibuildwheel/macos.py (L247-L260)

We shall really migrate to cibuildwheel
2024-09-26 18:38:23 +08:00
mio
9f89428abf
Update changelog for 2.1.1 2024-09-26 18:15:48 +08:00
mio
869968a96f
Only publish when tagging 2024-09-26 18:13:43 +08:00
mio
8bd254c6f5
Update changelog 2024-09-26 17:28:54 +08:00
mio
d645848fd3
Fix macos wheels 2024-09-26 17:26:16 +08:00
mio
08e14abf70
Remove hacks for bdist_wheel 2024-09-26 17:18:36 +08:00
mio
1e04dbf83b
Remove pkg-packages 2024-09-26 17:15:53 +08:00
mio
f164769a9a
Update logging 2024-09-22 00:14:03 +08:00
mio
f8a1e3e695
Update changelog 2024-09-22 00:13:20 +08:00
mio
ed37d2561d
Update release.yml 2024-09-21 23:31:51 +08:00
mio
cdd451a0de
Update prerelease.yml 2024-09-21 23:12:02 +08:00
mio
3f230f3a96
Update README to reflect dev branch 2024-09-21 23:02:38 +08:00
mio
67f08b1c27
Bump version and generate bindings 2024-09-21 23:00:57 +08:00
lazymio
6c4a3fd84b
Merge pull request #2005 from omer54463/dev
Add py.typed to the Python binding package
2024-09-21 23:00:41 +08:00
mio
78cb4affda
Fix uccallback 2024-09-21 22:48:32 +08:00
mio
d87791329f
Add a cmake option 2024-09-21 22:16:02 +08:00
mio
80f0898740
Merge remote-tracking branch 'bits/revive-qemu-logs' into dev 2024-09-21 22:09:07 +08:00
mio
920d076e51
Remove page-collection-locs 2024-09-21 22:03:44 +08:00
mio
6cc7e1d431
Also only reset if hooks are installed 2024-09-21 21:52:38 +08:00
mio
8816883bb3
Fix TLB for snapshots 2024-09-21 21:49:01 +08:00
mio
2cd227f804
Update symbols for tlb_reset_dirty_by_vaddr 2024-09-21 20:54:24 +08:00
mio
8f74405031
Update symbols 2024-09-21 20:51:35 +08:00
Andrei Warkentin
d01035767e
notdirty_write: fix store-related performance problems
Every store would always cause the tb_invalidate_phys_page_fast path to be invoked,
amounting to a 40x slowdown of stores compared to loads.

Change this code to only worry about TB invalidation for regions marked as
executable (i.e. emulated executable).

Even without uc_set_native_thunks, this change fixes most of the performance
issues seen with thunking to native calls.

Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
2024-09-21 20:50:43 +08:00
mio
9f21566b53
Also update macos 2024-09-21 20:48:51 +08:00
mio
7fb38e0e66
Avoid failure of pushing to github 2024-09-21 20:48:51 +08:00
lazymio
0d26efd07e
Merge pull request #2003 from elicn/dev
Misc. Python binding re-arrangements
2024-09-21 18:43:02 +08:00
lazymio
9427f0a553
Merge pull request #1991 from apparentlymart/b-riscv-invalidinsn-pcadj
riscv: Invalid 32-bit instruction should not decrement pc
2024-09-21 18:26:59 +08:00
mio
96bf47dd7a
Update CI 2024-09-21 18:24:46 +08:00
lazymio
22d6febff1
Merge pull request #1985 from atipls/dev
Update zig bindings to 0.13.0
2024-09-21 18:01:11 +08:00
mio
87c0b86248
Format code 2024-09-21 17:59:23 +08:00
mio
a5fa548049
Fix qemu_vfree implementation on MINGW
Also correctly release bounce.buffer
2024-09-21 17:58:15 +08:00
Omer Lubin
5c7fa35b43 ADD py.typed 2024-09-21 00:05:48 +03:00
elicn
386e0ed575 Include networking auditing sample in script 2024-09-19 17:17:04 +03:00
elicn
5cc2d80916 Adjust import path to new path 2024-09-19 17:16:21 +03:00
elicn
f573356a8b Add initial support for batch operations 2024-09-19 17:15:24 +03:00
elicn
4471377b77 Styling fixes 2024-09-19 17:13:36 +03:00
elicn
754194c7e8 Improve documentation 2024-09-19 17:04:21 +03:00
elicn
2da154721b Remove repr surplus method 2024-09-19 17:00:33 +03:00
elicn
7deb613a3c Reduce namespace clutter 2024-09-19 16:58:03 +03:00
lazymio
379791ad56
Merge pull request #1995 from apparentlymart/f-qemu-backport-wfi-umode
[QEMU backport] riscv: fix wfi exception behavior
2024-09-04 15:36:00 +08:00
Jose Martins
58f1a612e8 target/riscv: fix wfi exception behavior
The wfi exception trigger behavior should take into account user mode,
hstatus.vtw, and the fact the an wfi might raise different types of
exceptions depending on various factors:

If supervisor mode is not present:

- an illegal instruction exception should be generated if user mode
executes and wfi instruction and mstatus.tw = 1.

If supervisor mode is present:

- when a wfi instruction is executed, an illegal exception should be triggered
if either the current mode is user or the mode is supervisor and mstatus.tw is
set.

Plus, if the hypervisor extensions are enabled:

- a virtual instruction exception should be raised when a wfi is executed from
virtual-user or virtual-supervisor and hstatus.vtw is set.

Signed-off-by: Jose Martins <josemartins90@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210420213656.85148-1-josemartins90@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-09-03 13:44:55 -07:00
Martin Atkins
ac1b37421d riscv: Invalid 32-bit instruction should not decrement pc
This line appears to be trying to undo the effect of adding 4 to pc above,
but does so incorrectly and so ends up returning with next_pc earlier than
it was prior to decoding.

This causes the translator to malfunction because it does not expect
pc_next to decrease during decoding: this is effectively reporting that
the invalid construction has a negative size, which is impossible. The
decoder uses the increase in next_pc to decide the translation block size,
but converts it to uint16_t thereby causing a block containing _only_ an
invalid instruction to be treated as having size 65532 (reinterpreted -4)
and therefore the translation loop tries to find the next translation block
at 65532 bytes after the invalid instruction, which can cause a spurious
instruction access/page fault if the page containing that address is not
mapped as executable.

In practice we don't need to readjust the pc at all here because it is
correct to report that the invalid instruction is four bytes long. This
allows the translation loop to correctly find the next instruction, and
to avoid producing spurious TLB fills that might cause incorrect exceptions.
2024-08-28 14:06:17 -07:00
atipls
da9b95501c Update zig bindings to 0.13.0 2024-08-08 10:15:50 +02:00
Duncan Ogilvie
87610baa3f
Fix emulator detection (#1966)
* Add a quick test helper macro to test_x86.c

* Add regression tests for bswap and rex prefixes

* Properly ignore REX prefixes when appropriate

* Fix bswap ax emulator detection
2024-07-19 11:11:21 +08:00
BitMaskMixer
8e6499fb0b
gcc compiler warning fixes (#1977)
* fix for enum-int-mismatch

* fix for unused-variable
2024-07-19 11:09:57 +08:00