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Update symbols for tlb_reset_dirty_by_vaddr

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This commit is contained in:
mio 2024-09-21 20:54:24 +08:00
parent 8f74405031
commit 2cd227f804
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GPG Key ID: DFF27E34A47CB873
18 changed files with 18 additions and 1 deletions
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1
qemu/aarch64.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_aarch64
#define gen_helper_cpsr_read gen_helper_cpsr_read_aarch64
#define gen_helper_cpsr_write gen_helper_cpsr_write_aarch64
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_aarch64
#define cpu_aarch64_init cpu_aarch64_init_aarch64
#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_aarch64
#define arm_cpu_update_virq arm_cpu_update_virq_aarch64

2
qemu/accel/tcg/cputlb.c
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@ -1193,7 +1193,7 @@ static void notdirty_write(CPUState *cpu, vaddr mem_vaddr, unsigned size,
ram_addr_t ram_addr = mem_vaddr + iotlbentry->addr;
if (mr == NULL) {
mr = memory_mapping(cpu->uc, mem_vaddr);
mr = cpu->uc->memory_mapping(cpu->uc, mem_vaddr);
}
if ((mr->perms & UC_PROT_EXEC) != 0) {

1
qemu/arm.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_arm
#define gen_helper_cpsr_read gen_helper_cpsr_read_arm
#define gen_helper_cpsr_write gen_helper_cpsr_write_arm
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_arm
#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_arm
#define arm_cpu_update_virq arm_cpu_update_virq_arm
#define arm_cpu_update_vfiq arm_cpu_update_vfiq_arm

1
qemu/m68k.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_m68k
#define gen_helper_cpsr_read gen_helper_cpsr_read_m68k
#define gen_helper_cpsr_write gen_helper_cpsr_write_m68k
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_m68k
#define cpu_m68k_init cpu_m68k_init_m68k
#define helper_reds32 helper_reds32_m68k
#define helper_redf32 helper_redf32_m68k

1
qemu/mips.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_mips
#define gen_helper_cpsr_read gen_helper_cpsr_read_mips
#define gen_helper_cpsr_write gen_helper_cpsr_write_mips
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mips
#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mips
#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mips
#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mips

1
qemu/mips64.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_mips64
#define gen_helper_cpsr_read gen_helper_cpsr_read_mips64
#define gen_helper_cpsr_write gen_helper_cpsr_write_mips64
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mips64
#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mips64
#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mips64
#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mips64

1
qemu/mips64el.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_mips64el
#define gen_helper_cpsr_read gen_helper_cpsr_read_mips64el
#define gen_helper_cpsr_write gen_helper_cpsr_write_mips64el
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mips64el
#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mips64el
#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mips64el
#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mips64el

1
qemu/mipsel.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_mipsel
#define gen_helper_cpsr_read gen_helper_cpsr_read_mipsel
#define gen_helper_cpsr_write gen_helper_cpsr_write_mipsel
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mipsel
#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mipsel
#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mipsel
#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mipsel

1
qemu/ppc.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_ppc
#define gen_helper_cpsr_read gen_helper_cpsr_read_ppc
#define gen_helper_cpsr_write gen_helper_cpsr_write_ppc
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_ppc
#define ppc_cpu_unrealize ppc_cpu_unrealize_ppc
#define ppc_cpu_instance_finalize ppc_cpu_instance_finalize_ppc
#define ppc_cpu_do_interrupt ppc_cpu_do_interrupt_ppc

1
qemu/ppc64.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_ppc64
#define gen_helper_cpsr_read gen_helper_cpsr_read_ppc64
#define gen_helper_cpsr_write gen_helper_cpsr_write_ppc64
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_ppc64
#define ppc_cpu_unrealize ppc_cpu_unrealize_ppc64
#define ppc_cpu_instance_finalize ppc_cpu_instance_finalize_ppc64
#define ppc_cpu_do_interrupt ppc_cpu_do_interrupt_ppc64

1
qemu/riscv32.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_riscv32
#define gen_helper_cpsr_read gen_helper_cpsr_read_riscv32
#define gen_helper_cpsr_write gen_helper_cpsr_write_riscv32
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_riscv32
#define riscv_cpu_mmu_index riscv_cpu_mmu_index_riscv32
#define riscv_cpu_exec_interrupt riscv_cpu_exec_interrupt_riscv32
#define riscv_cpu_fp_enabled riscv_cpu_fp_enabled_riscv32

1
qemu/riscv64.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_riscv64
#define gen_helper_cpsr_read gen_helper_cpsr_read_riscv64
#define gen_helper_cpsr_write gen_helper_cpsr_write_riscv64
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_riscv64
#define riscv_cpu_mmu_index riscv_cpu_mmu_index_riscv64
#define riscv_cpu_exec_interrupt riscv_cpu_exec_interrupt_riscv64
#define riscv_cpu_fp_enabled riscv_cpu_fp_enabled_riscv64

1
qemu/s390x.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_s390x
#define gen_helper_cpsr_read gen_helper_cpsr_read_s390x
#define gen_helper_cpsr_write gen_helper_cpsr_write_s390x
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_s390x
#define helper_uc_s390x_exit helper_uc_s390x_exit_s390x
#define tcg_s390_tod_updated tcg_s390_tod_updated_s390x
#define tcg_s390_program_interrupt tcg_s390_program_interrupt_s390x

1
qemu/sparc.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_sparc
#define gen_helper_cpsr_read gen_helper_cpsr_read_sparc
#define gen_helper_cpsr_write gen_helper_cpsr_write_sparc
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_sparc
#define helper_compute_psr helper_compute_psr_sparc
#define helper_compute_C_icc helper_compute_C_icc_sparc
#define cpu_sparc_set_id cpu_sparc_set_id_sparc

1
qemu/sparc64.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_sparc64
#define gen_helper_cpsr_read gen_helper_cpsr_read_sparc64
#define gen_helper_cpsr_write gen_helper_cpsr_write_sparc64
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_sparc64
#define helper_compute_psr helper_compute_psr_sparc64
#define helper_compute_C_icc helper_compute_C_icc_sparc64
#define cpu_sparc_set_id cpu_sparc_set_id_sparc64

1
qemu/tricore.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_tricore
#define gen_helper_cpsr_read gen_helper_cpsr_read_tricore
#define gen_helper_cpsr_write gen_helper_cpsr_write_tricore
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_tricore
#define helper_fadd helper_fadd_tricore
#define helper_fsub helper_fsub_tricore
#define helper_fmul helper_fmul_tricore

1
qemu/x86_64.h
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@ -1287,6 +1287,7 @@
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_x86_64
#define gen_helper_cpsr_read gen_helper_cpsr_read_x86_64
#define gen_helper_cpsr_write gen_helper_cpsr_write_x86_64
#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_x86_64
#define cpu_get_tsc cpu_get_tsc_x86_64
#define x86_cpu_get_memory_mapping x86_cpu_get_memory_mapping_x86_64
#define cpu_x86_update_dr7 cpu_x86_update_dr7_x86_64

1
symbols.sh
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@ -1287,6 +1287,7 @@ gen_helper_vfp_get_fpscr \
gen_helper_vfp_set_fpscr \
gen_helper_cpsr_read \
gen_helper_cpsr_write \
tlb_reset_dirty_by_vaddr \
"
x86_64_SYMBOLS="