mio
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9c5358c759
|
Respect QEMU ZMM_Q to work on big endian hosts
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2022-10-28 17:37:02 +02:00 |
|
mio
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6162708bb2
|
Hack more to support BE32
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2022-10-21 11:30:22 +02:00 |
|
mio
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3ea7857be3
|
Exit early when invalid read happens
In this way, the target register won't be overwritten
|
2022-10-20 21:57:28 +02:00 |
|
mio
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13b8e2625f
|
Check PC range for mem hooks
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2022-10-20 21:25:21 +02:00 |
|
mio
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a5d4d30a31
|
Sync PC for mem ldst on aarch64
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2022-10-20 21:19:18 +02:00 |
|
mio
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35010035d7
|
Fix macro typo
Thanks @roehling
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2022-10-20 20:10:27 +02:00 |
|
TSR Berry
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442dd437e1
|
aarch64: Move FPCR and FPSR registers to not break compatibility
Co-authored-by: merry <git@mary.rs>
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2022-10-14 17:31:20 +02:00 |
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TSR Berry
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12fd4fc086
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aarch64: Add FPCR and FPSR registers
Co-authored-by: merry <git@mary.rs>
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2022-10-14 15:18:14 +02:00 |
|
mio
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19d8876e23
|
Deep copy for arm cpu state
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2022-10-01 00:14:08 +02:00 |
|
lazymio
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5e060513a0
|
Merge pull request #1687 from relapids/clang_cl_support
Allow building with clang-cl (using MSVC config) on Windows.
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2022-09-27 23:02:21 +02:00 |
|
mio
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32a3a6865a
|
Don't resize user alloc-ed memory
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2022-09-25 17:41:33 +02:00 |
|
Mio
|
a0e119c6f0
|
Format code
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2022-08-31 23:27:24 +08:00 |
|
Mio
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092014a6cc
|
Don't sync pc if user requests a restart
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2022-08-31 23:27:05 +08:00 |
|
lazymio
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a63002872f
|
Merge pull request #1688 from relapids/tricore_leak
Fix memory leaks in TriCore target. (#1681)
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2022-08-31 22:07:10 +08:00 |
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relapids
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e15173dd26
|
Fix memory leaks in TriCore target.
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2022-08-15 21:26:29 -07:00 |
|
relapids
|
a3ccbf2e59
|
Fix memory leak in PPC target.
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2022-08-15 18:57:10 -07:00 |
|
relapids
|
5a54b3d7af
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Fix a segfault inside tb_remove_from_jmp_list by forcing clang-cl to use the same atomic routines as MSVC.
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2022-08-15 15:50:46 -07:00 |
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relapids
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2ac7b55797
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Allow building with clang-cl on Windows.
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2022-08-15 15:50:46 -07:00 |
|
mio
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2c00546c6e
|
Merge rhelmot's fix
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2022-08-14 13:35:54 +02:00 |
|
mio
|
8303328aa8
|
Obtain memory mapping after hooks are called
|
2022-08-14 12:42:53 +02:00 |
|
lazymio
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ffb047fe37
|
Merge pull request #1668 from Yu3H0/fix_tricore_pc_problem
fix issue 1663:tricore pc don't move
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2022-07-26 22:08:43 +08:00 |
|
Yu3h0
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ca6a8b4cac
|
fix issue 1663:tricore pc don't move
|
2022-07-26 13:41:13 +08:00 |
|
mio
|
6db6790ec2
|
Merge remote-tracking branch 'zachesez/ppc_cr_read_fix' into dev
|
2022-07-23 20:46:40 +08:00 |
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mio
|
6d283cf464
|
Fix ppc symbols clash
|
2022-07-23 20:39:55 +08:00 |
|
Zach Szczesniak
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2b25867e4b
|
Fixed endianness when writing PPC32 CR register.
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2022-07-20 18:31:13 -04:00 |
|
Duncan Ogilvie
|
22ea31cdf7
|
Fail when VEX.L is set in SSE instructions (AVX is not supported)
Closes #1656
|
2022-07-20 13:48:31 +02:00 |
|
lazymio
|
fdd129fd30
|
Remember the regions a hook has intrumented and clear cache on deletion
|
2022-06-02 14:46:02 +02:00 |
|
lazymio
|
289034538d
|
Cleaner implementation for uc_mem_prot on mmio regions
|
2022-05-28 23:46:06 +02:00 |
|
lazymio
|
2a6529348c
|
Support uc_mem_protect on mmio regions
Also make mmio ranges return the correct errors on wrong protection
|
2022-05-28 23:33:43 +02:00 |
|
lazymio
|
ba50035830
|
Format code
|
2022-05-23 12:30:44 +02:00 |
|
lazymio
|
17fa839a56
|
Eliminate more warnings in s390x
|
2022-05-21 00:07:20 +02:00 |
|
lazymio
|
82d1c9e925
|
Eliminate warnings
|
2022-05-21 00:02:29 +02:00 |
|
lazymio
|
9167ab8671
|
Set riscv_get_pc for uc->get_pc
|
2022-05-21 00:02:22 +02:00 |
|
lazymio
|
cc4ed6ee50
|
Merge pull request #1621 from ondryaso/dev-registers
Support reads and writes over all Arm SIMD registers
|
2022-05-20 14:48:59 +02:00 |
|
lazymio
|
5d37e21db5
|
Don't call hooks if there is already an unhandled exception
|
2022-05-20 13:15:23 +02:00 |
|
Ondřej Ondryáš
|
f3b776dd7d
|
Support reads and writes over all Arm SIMD registers
|
2022-05-20 00:30:11 +02:00 |
|
lazymio
|
b827ebf4c3
|
Format code
|
2022-05-07 00:30:18 +02:00 |
|
lazymio
|
345b63ee96
|
Only exit TB if pc is within the memory range
|
2022-05-07 00:16:31 +02:00 |
|
Eric Poole
|
cfee2139a0
|
TriCore Support (#1568)
* TriCore Support
python sample
* Update sample_tricore.py
Correct attribution
* Update sample_tricore.py
Fixed byte code to execute properly.
* Update sample_tricore.py
Removed testing artifact
* Added tricore msvc config-file.h
* Added STATIC to tricore config and added helper methods to symbol file generation.
* Update op_helper.c
Use built in crc32
* Fix tricore samples and small code blocks are now handled properly
* Add CPU types
* Generate bindings
* Format code
Co-authored-by: lazymio <mio@lazym.io>
|
2022-04-29 23:11:34 +02:00 |
|
lazymio
|
8fb4b45f57
|
Resume CPU for writing PC
|
2022-04-26 01:53:02 +02:00 |
|
lazymio
|
4e22744679
|
Support flushing translation blocks and flush when we don't need count hook
|
2022-04-26 01:17:58 +02:00 |
|
lazymio
|
656dde9f60
|
Fix MSVC build
|
2022-04-16 23:37:52 +02:00 |
|
lazymio
|
3d3deac5e6
|
Fix crash when mapping a big memory and calling uc_close
|
2022-04-16 19:17:41 +02:00 |
|
lazymio
|
b136f08f2d
|
Check CPU model for uc_ctl
|
2022-04-16 17:49:47 +02:00 |
|
shuffle2
|
2912cd1e29
|
fix rust bindings build on windows (#1584)
Refine rust bindings.
|
2022-04-16 13:40:04 +02:00 |
|
lazymio
|
e3d0a33ab8
|
Fix BE32 usermode address XOR
|
2022-04-05 11:55:58 +02:00 |
|
lazymio
|
7e64e620d2
|
Remove unassigned_io_write from ioport.c
|
2022-04-04 11:25:40 +02:00 |
|
lazymio
|
2f113b11d1
|
Fix symbol clash on bunlded static libs
|
2022-04-04 11:24:59 +02:00 |
|
rose
|
fc0d9a82a5
|
Fix clang-cl compile with CONFIG_INT128 in qemu
|
2022-04-03 16:30:26 -04:00 |
|
lazymio
|
7e6d21d27c
|
Fix memory leak in code_gen_buffer
|
2022-04-03 21:44:09 +02:00 |
|