- Q flag / GE flag were not included in APSR register (read/write)
- UC_ARM_REG_APSR_NZCV register constant was ignored completely.
- regression test added
* Fix watchpoint leak in ARM
* Builds fuzz targets with sanitizer support
* Builds fuzz targets with directory driver
* Adds script to dowlonad public corpus
* Adds CIfuzz
To checks Pull Requests with fuzzing
* Use static library for fuzz targets
* Less verbose logs for fuzz driver directory
* fix finding python path which only has python3.
* fix#1246, arm host issue.
* skip assembler tests on non-x86 host.
* update macro of dummy value.
* fix MSVC macro.
* update dummy array value macro.
* restore to original qemu code.
* Adding regression test for issue where writing memory into a read only segment during a access callback fails.
* Check for TLB invalidation when calling read callbacks; Writes to read-only memory by the callback cause a TLB flush which requires a re-read of the TLB.
* Fixed the decoding of opcodes after getting vex2 using 0xc5
* Added testcase for vex. Can and should be expanded
* Fixed warning of testcase for vex (parentheses for assignment)
* Fuzzing M68K without abort
* UC_MODE_32 is not ok with sparc
use UC_MODE_SPARC32|UC_MODE_BIG_ENDIAN instead
* Temporary removing leaking on start targets
* Do not abort for m68K undef instructions
* Integration with oss-fuzz
* Use CFLAGS even for linking
as for fuzzing with asan
* Do not abort on uc_emu_start error
* Redirect fuzz output somewhere else than stdout
* Use uc_open for every fuzz instance
* Avoids timeouts from infinite loops
Limiting the number of instructions
* Moving fuzz to tests directory
Adds SYSENTER to the whitelist of supported hookable instructions in unicorn
as well as fixes up the existing sysenter_hook_x86 regression test which was
previously failing
Fixesunicorn-engine/unicorn#995
* add x86_64_msr.py test demonstrating setting MSRs and FS/GS segments
* x86_64_msr.py: remove references to hooks
* x86_64_msr.py: remove references to old global variable
* Move assembly to S files
* more assembly files
* osx compilation change
* makefile mistake
* add objcopy from crosstool
* use gobjcopy on osx
* start cmocka install cleanup
* move wget to directory option
* move back to cd
* fix copy
* First cut
* free allocated memory
* bad idea
too much switching between python and c
* add debug
* cleanup bad size
* reg_read and reg_write now work with registers W0 through W30 in Aarch64 emulaton
* Added a regress test for the ARM64 reg_read and reg_write on 32-bit registers (W0-W30)
Added a new macro in uc_priv.h (WRITE_DWORD_TO_QWORD), in order to write to the lower 32 bits of a 64 bit value without overwriting the whole value when using reg_write
* Fixed WRITE_DWORD macro
reg_write would zero out the high order bits when writing to 32 bit registers
e.g. uc.reg_write(UC_X86_REG_EAX, 0) would also set register RAX to zero
