Robert Xiao
30d202b89e
Simplify reg_read/reg_write, obtaining a perf boost.
...
Single reg_read/reg_write is now about 25% faster.
2023-06-16 15:23:42 -07:00
Robert Xiao
074566cf69
Slight refactoring to reduce code duplication.
...
This also comes with a performance bump due to inlining of reg_read/reg_write
(as they're only called once now) and the unlikely() on CHECK_REG_TYPE.
2023-06-16 15:23:42 -07:00
Robert Xiao
4055a5ab10
Implement uc_reg_{read,write}{,_batch}2 APIs.
...
These APIs take size parameters, which can be used to properly bounds-check the
inputs and outputs for various registers. Additionally, all backends now throw
UC_ERR_ARG if the input register numbers are invalid.
Completes #1831 .
2023-06-16 15:23:42 -07:00
Takacs, Philipp
e96ac42b2e
Remove MMU hacks
...
Unicorn has included some ugly hacks to provide a envirement where vaddr == paddr.
These hacks where to use the full 64 bit mappings on x86 without init the mmu
and some memory redirect for MIPS.
The UC_TLB_CPU mode defaults to vaddr == paddr, therfor these hacks aren't
required anymore.
2023-03-28 14:02:17 +02:00
Takacs, Philipp
e25419bb2d
add virtuall tlb
...
this virtuall tlb allows to use mmu indipendent of the architectur
2023-03-28 13:50:11 +02:00
Takacs, Philipp
b7b1a4d6b4
difference between stop_request and quit_request
...
quit_request is for internal use. This means the IP register was updated and
qemu needs to rebuild the translation blocks.
stop_request is set by the user (uc_emu_stop) to indecate that unicorn sould
stop emulating.
2023-03-07 14:38:49 +01:00
lazymio
9167ab8671
Set riscv_get_pc for uc->get_pc
2022-05-21 00:02:22 +02:00
lazymio
345b63ee96
Only exit TB if pc is within the memory range
2022-05-07 00:16:31 +02:00
mio
085ee07c73
No more hard-coded cpu models
2021-12-30 01:05:10 +01:00
lazymio
87a391d549
Inline uc_tracecode when there is only exactly one hook
2021-11-21 16:44:39 +01:00
lazymio
640251e1aa
Leave out size parameter in callback
2021-11-09 00:21:34 +01:00
lazymio
c6fdbb3735
Add RISCV CSR registers
2021-11-07 20:36:04 +01:00
lazymio
613ddf0985
Format
2021-11-04 19:58:44 +01:00
lazymio
172a2fbe6d
Support changing cpu model for riscv
2021-11-04 19:13:53 +01:00
lazymio
09aa0f944f
Merge QDucasse:riscv_extension_d
...
Fix and close #1469
Fix test for riscv float points
Fix the riscv cpu config we left out
2021-11-03 13:20:46 +01:00
lazymio
bcf85be86d
Add a new hook type UC_HOOK_TCG_OPCODE
2021-11-03 01:46:24 +01:00
lazymio
3dd2e0f95d
Basic implementation of uc_ctl
2021-11-01 00:39:36 +01:00
lazymio
e62b0ef255
Add clang-format and format code to qemu code style
2021-10-29 12:44:49 +02:00
lazymio
e695686c15
Remove AFL Integration by reverting
2021-10-26 11:22:21 +02:00
lazymio
7ac7c23c12
Fix Windows build for AFL integration
2021-10-25 16:11:58 +02:00
lazymio
1fa2eb688b
Fix UC_MODE_AFL and update config
2021-10-25 14:39:40 +02:00
lazymio
dd7476a9bd
Initial import unicornafl
2021-10-25 00:51:16 +02:00
mio
567bd08b86
Update riscv pc and fix #1465
2021-10-19 23:22:13 +02:00
Nguyen Anh Quynh
aaaea14214
import Unicorn2
2021-10-03 22:14:44 +08:00
