Peter Maydell ed336850e8 target-arm: Fix TCG temp handling in 64 bit cp writes
Fix errors in the TCG temp handling in the 64 bit coprocessor
write path: we were reusing a 32 bit temp after it had been
freed by store_reg(), and failing to free a 64 bit temp.

This bug has no visible effect at this point because there
aren't any non-NOP 64 bit registers yet; it needs to be fixed
as a prerequisite for the 64 bit registers in LPAE support.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-07-12 10:59:53 +00:00
2012-06-15 20:58:54 +04:00
2012-06-24 01:04:45 +02:00
2012-06-21 20:04:24 +00:00
2012-06-18 15:32:45 +02:00
2012-06-21 17:59:27 -05:00
2012-07-07 09:04:42 +00:00
2012-06-29 13:31:07 +02:00
2012-06-29 13:31:07 +02:00
2012-06-28 20:28:08 +00:00
2012-06-24 01:04:51 +02:00
2012-06-24 01:04:51 +02:00
2012-06-27 16:33:26 -05:00
2012-06-29 13:31:07 +02:00
2012-06-29 13:27:28 +02:00
2012-06-15 10:41:05 -03:00
2012-06-28 20:28:36 +00:00
2012-06-29 13:27:28 +02:00
2012-06-29 13:27:28 +02:00
2012-06-28 20:28:36 +00:00
2012-06-29 13:27:28 +02:00
2012-06-24 12:16:51 +00:00
2012-06-21 18:45:18 +00:00
2012-06-29 13:18:21 +02:00
2012-06-22 10:34:21 +01:00
2012-06-28 20:28:08 +00:00
2012-06-29 13:18:21 +02:00

Read the documentation in qemu-doc.html or on http://wiki.qemu.org

- QEMU team
Description
No description provided
Readme 404 MiB
Languages
C 82.6%
C++ 6.5%
Python 3.4%
Dylan 2.9%
Shell 1.6%
Other 2.8%