Introduce Xen PCI Passthrough, qdevice
A more complete history can be found here: git://xenbits.xensource.com/qemu-xen-unstable.git Signed-off-by: Allen Kay <allen.m.kay@intel.com> Signed-off-by: Guy Zana <guy@neocleus.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
This commit is contained in:
Allen Kay
Stefano Stabellini
parent
679042f0e1
commit
eaab4d60d3
@ -8,6 +8,7 @@ obj-y += pc_piix.o
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obj-y += pc_sysfw.o
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obj-$(CONFIG_XEN) += xen_platform.o xen_apic.o
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obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o
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obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o
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obj-y += kvm/
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obj-$(CONFIG_SPICE) += qxl.o qxl-logger.o qxl-render.o
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@ -150,4 +150,7 @@ static inline int xen_xc_hvm_inject_msi(XenXC xen_xc, domid_t dom,
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void destroy_hvm_domain(bool reboot);
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/* shutdown/destroy current domain because of an error */
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void xen_shutdown_fatal_error(const char *fmt, ...) GCC_FMT_ATTR(1, 2);
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#endif /* QEMU_HW_XEN_COMMON_H */
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812
hw/xen_pt.c
Normal file
812
hw/xen_pt.c
Normal file
@ -0,0 +1,812 @@
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/*
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* Copyright (c) 2007, Neocleus Corporation.
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* Copyright (c) 2007, Intel Corporation.
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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* Alex Novik <alex@neocleus.com>
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* Allen Kay <allen.m.kay@intel.com>
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* Guy Zana <guy@neocleus.com>
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*
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* This file implements direct PCI assignment to a HVM guest
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*/
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/*
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* Interrupt Disable policy:
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*
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* INTx interrupt:
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* Initialize(register_real_device)
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* Map INTx(xc_physdev_map_pirq):
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* <fail>
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* - Set real Interrupt Disable bit to '1'.
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* - Set machine_irq and assigned_device->machine_irq to '0'.
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* * Don't bind INTx.
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*
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* Bind INTx(xc_domain_bind_pt_pci_irq):
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* <fail>
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* - Set real Interrupt Disable bit to '1'.
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* - Unmap INTx.
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* - Decrement xen_pt_mapped_machine_irq[machine_irq]
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* - Set assigned_device->machine_irq to '0'.
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*
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* Write to Interrupt Disable bit by guest software(xen_pt_cmd_reg_write)
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* Write '0'
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* - Set real bit to '0' if assigned_device->machine_irq isn't '0'.
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*
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* Write '1'
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* - Set real bit to '1'.
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*/
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#include <sys/ioctl.h>
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#include "pci.h"
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#include "xen.h"
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#include "xen_backend.h"
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#include "xen_pt.h"
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#include "range.h"
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#define XEN_PT_NR_IRQS (256)
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static uint8_t xen_pt_mapped_machine_irq[XEN_PT_NR_IRQS] = {0};
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void xen_pt_log(const PCIDevice *d, const char *f, ...)
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{
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va_list ap;
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va_start(ap, f);
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if (d) {
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fprintf(stderr, "[%02x:%02x.%d] ", pci_bus_num(d->bus),
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PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
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}
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vfprintf(stderr, f, ap);
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va_end(ap);
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}
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/* Config Space */
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static int xen_pt_pci_config_access_check(PCIDevice *d, uint32_t addr, int len)
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{
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/* check offset range */
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if (addr >= 0xFF) {
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XEN_PT_ERR(d, "Failed to access register with offset exceeding 0xFF. "
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"(addr: 0x%02x, len: %d)\n", addr, len);
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return -1;
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}
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/* check read size */
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if ((len != 1) && (len != 2) && (len != 4)) {
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XEN_PT_ERR(d, "Failed to access register with invalid access length. "
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"(addr: 0x%02x, len: %d)\n", addr, len);
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return -1;
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}
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/* check offset alignment */
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if (addr & (len - 1)) {
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XEN_PT_ERR(d, "Failed to access register with invalid access size "
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"alignment. (addr: 0x%02x, len: %d)\n", addr, len);
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return -1;
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}
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return 0;
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}
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int xen_pt_bar_offset_to_index(uint32_t offset)
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{
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int index = 0;
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/* check Exp ROM BAR */
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if (offset == PCI_ROM_ADDRESS) {
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return PCI_ROM_SLOT;
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}
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/* calculate BAR index */
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index = (offset - PCI_BASE_ADDRESS_0) >> 2;
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if (index >= PCI_NUM_REGIONS) {
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return -1;
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}
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return index;
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}
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static uint32_t xen_pt_pci_read_config(PCIDevice *d, uint32_t addr, int len)
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{
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XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d);
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uint32_t val = 0;
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XenPTRegGroup *reg_grp_entry = NULL;
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XenPTReg *reg_entry = NULL;
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int rc = 0;
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int emul_len = 0;
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uint32_t find_addr = addr;
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if (xen_pt_pci_config_access_check(d, addr, len)) {
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goto exit;
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}
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/* find register group entry */
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reg_grp_entry = xen_pt_find_reg_grp(s, addr);
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if (reg_grp_entry) {
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/* check 0-Hardwired register group */
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if (reg_grp_entry->reg_grp->grp_type == XEN_PT_GRP_TYPE_HARDWIRED) {
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/* no need to emulate, just return 0 */
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val = 0;
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goto exit;
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}
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}
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/* read I/O device register value */
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rc = xen_host_pci_get_block(&s->real_device, addr, (uint8_t *)&val, len);
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if (rc < 0) {
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XEN_PT_ERR(d, "pci_read_block failed. return value: %d.\n", rc);
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memset(&val, 0xff, len);
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}
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/* just return the I/O device register value for
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* passthrough type register group */
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if (reg_grp_entry == NULL) {
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goto exit;
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}
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/* adjust the read value to appropriate CFC-CFF window */
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val <<= (addr & 3) << 3;
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emul_len = len;
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/* loop around the guest requested size */
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while (emul_len > 0) {
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/* find register entry to be emulated */
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reg_entry = xen_pt_find_reg(reg_grp_entry, find_addr);
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if (reg_entry) {
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XenPTRegInfo *reg = reg_entry->reg;
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uint32_t real_offset = reg_grp_entry->base_offset + reg->offset;
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uint32_t valid_mask = 0xFFFFFFFF >> ((4 - emul_len) << 3);
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uint8_t *ptr_val = NULL;
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valid_mask <<= (find_addr - real_offset) << 3;
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ptr_val = (uint8_t *)&val + (real_offset & 3);
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/* do emulation based on register size */
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switch (reg->size) {
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case 1:
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if (reg->u.b.read) {
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rc = reg->u.b.read(s, reg_entry, ptr_val, valid_mask);
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}
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break;
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case 2:
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if (reg->u.w.read) {
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rc = reg->u.w.read(s, reg_entry,
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(uint16_t *)ptr_val, valid_mask);
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}
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break;
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case 4:
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if (reg->u.dw.read) {
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rc = reg->u.dw.read(s, reg_entry,
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(uint32_t *)ptr_val, valid_mask);
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}
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break;
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}
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if (rc < 0) {
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xen_shutdown_fatal_error("Internal error: Invalid read "
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"emulation. (%s, rc: %d)\n",
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__func__, rc);
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return 0;
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}
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/* calculate next address to find */
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emul_len -= reg->size;
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if (emul_len > 0) {
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find_addr = real_offset + reg->size;
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}
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} else {
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/* nothing to do with passthrough type register,
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* continue to find next byte */
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emul_len--;
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find_addr++;
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}
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}
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/* need to shift back before returning them to pci bus emulator */
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val >>= ((addr & 3) << 3);
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exit:
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XEN_PT_LOG_CONFIG(d, addr, val, len);
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return val;
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}
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static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr,
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uint32_t val, int len)
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{
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XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d);
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int index = 0;
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XenPTRegGroup *reg_grp_entry = NULL;
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int rc = 0;
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uint32_t read_val = 0;
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int emul_len = 0;
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XenPTReg *reg_entry = NULL;
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uint32_t find_addr = addr;
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XenPTRegInfo *reg = NULL;
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if (xen_pt_pci_config_access_check(d, addr, len)) {
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return;
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}
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XEN_PT_LOG_CONFIG(d, addr, val, len);
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/* check unused BAR register */
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index = xen_pt_bar_offset_to_index(addr);
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if ((index >= 0) && (val > 0 && val < XEN_PT_BAR_ALLF) &&
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(s->bases[index].bar_flag == XEN_PT_BAR_FLAG_UNUSED)) {
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XEN_PT_WARN(d, "Guest attempt to set address to unused Base Address "
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"Register. (addr: 0x%02x, len: %d)\n", addr, len);
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}
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/* find register group entry */
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reg_grp_entry = xen_pt_find_reg_grp(s, addr);
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if (reg_grp_entry) {
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/* check 0-Hardwired register group */
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if (reg_grp_entry->reg_grp->grp_type == XEN_PT_GRP_TYPE_HARDWIRED) {
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/* ignore silently */
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XEN_PT_WARN(d, "Access to 0-Hardwired register. "
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"(addr: 0x%02x, len: %d)\n", addr, len);
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return;
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}
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}
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rc = xen_host_pci_get_block(&s->real_device, addr,
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(uint8_t *)&read_val, len);
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if (rc < 0) {
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XEN_PT_ERR(d, "pci_read_block failed. return value: %d.\n", rc);
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memset(&read_val, 0xff, len);
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}
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/* pass directly to the real device for passthrough type register group */
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if (reg_grp_entry == NULL) {
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goto out;
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}
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memory_region_transaction_begin();
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pci_default_write_config(d, addr, val, len);
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/* adjust the read and write value to appropriate CFC-CFF window */
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read_val <<= (addr & 3) << 3;
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val <<= (addr & 3) << 3;
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emul_len = len;
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/* loop around the guest requested size */
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while (emul_len > 0) {
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/* find register entry to be emulated */
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reg_entry = xen_pt_find_reg(reg_grp_entry, find_addr);
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if (reg_entry) {
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reg = reg_entry->reg;
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uint32_t real_offset = reg_grp_entry->base_offset + reg->offset;
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uint32_t valid_mask = 0xFFFFFFFF >> ((4 - emul_len) << 3);
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uint8_t *ptr_val = NULL;
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valid_mask <<= (find_addr - real_offset) << 3;
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ptr_val = (uint8_t *)&val + (real_offset & 3);
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/* do emulation based on register size */
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switch (reg->size) {
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case 1:
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if (reg->u.b.write) {
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rc = reg->u.b.write(s, reg_entry, ptr_val,
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read_val >> ((real_offset & 3) << 3),
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valid_mask);
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}
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break;
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case 2:
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if (reg->u.w.write) {
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rc = reg->u.w.write(s, reg_entry, (uint16_t *)ptr_val,
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(read_val >> ((real_offset & 3) << 3)),
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valid_mask);
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}
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break;
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case 4:
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if (reg->u.dw.write) {
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rc = reg->u.dw.write(s, reg_entry, (uint32_t *)ptr_val,
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(read_val >> ((real_offset & 3) << 3)),
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valid_mask);
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}
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break;
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}
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if (rc < 0) {
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xen_shutdown_fatal_error("Internal error: Invalid write"
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" emulation. (%s, rc: %d)\n",
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__func__, rc);
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return;
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}
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/* calculate next address to find */
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emul_len -= reg->size;
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if (emul_len > 0) {
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find_addr = real_offset + reg->size;
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}
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} else {
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/* nothing to do with passthrough type register,
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* continue to find next byte */
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emul_len--;
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find_addr++;
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}
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}
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/* need to shift back before passing them to xen_host_pci_device */
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val >>= (addr & 3) << 3;
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memory_region_transaction_commit();
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out:
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if (!(reg && reg->no_wb)) {
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/* unknown regs are passed through */
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rc = xen_host_pci_set_block(&s->real_device, addr,
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(uint8_t *)&val, len);
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if (rc < 0) {
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XEN_PT_ERR(d, "pci_write_block failed. return value: %d.\n", rc);
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}
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}
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}
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/* register regions */
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static uint64_t xen_pt_bar_read(void *o, target_phys_addr_t addr,
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unsigned size)
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{
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PCIDevice *d = o;
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/* if this function is called, that probably means that there is a
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* misconfiguration of the IOMMU. */
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XEN_PT_ERR(d, "Should not read BAR through QEMU. @0x"TARGET_FMT_plx"\n",
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addr);
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return 0;
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}
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static void xen_pt_bar_write(void *o, target_phys_addr_t addr, uint64_t val,
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unsigned size)
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{
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PCIDevice *d = o;
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/* Same comment as xen_pt_bar_read function */
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XEN_PT_ERR(d, "Should not write BAR through QEMU. @0x"TARGET_FMT_plx"\n",
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addr);
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}
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static const MemoryRegionOps ops = {
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.endianness = DEVICE_NATIVE_ENDIAN,
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.read = xen_pt_bar_read,
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.write = xen_pt_bar_write,
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};
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static int xen_pt_register_regions(XenPCIPassthroughState *s)
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{
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int i = 0;
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XenHostPCIDevice *d = &s->real_device;
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/* Register PIO/MMIO BARs */
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for (i = 0; i < PCI_ROM_SLOT; i++) {
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XenHostPCIIORegion *r = &d->io_regions[i];
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uint8_t type;
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if (r->base_addr == 0 || r->size == 0) {
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continue;
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}
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s->bases[i].access.u = r->base_addr;
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if (r->type & XEN_HOST_PCI_REGION_TYPE_IO) {
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type = PCI_BASE_ADDRESS_SPACE_IO;
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} else {
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type = PCI_BASE_ADDRESS_SPACE_MEMORY;
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if (r->type & XEN_HOST_PCI_REGION_TYPE_PREFETCH) {
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type |= PCI_BASE_ADDRESS_MEM_PREFETCH;
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}
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}
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memory_region_init_io(&s->bar[i], &ops, &s->dev,
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"xen-pci-pt-bar", r->size);
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pci_register_bar(&s->dev, i, type, &s->bar[i]);
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XEN_PT_LOG(&s->dev, "IO region %i registered (size=0x%08"PRIx64
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" base_addr=0x%08"PRIx64" type: %#x)\n",
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i, r->size, r->base_addr, type);
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}
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/* Register expansion ROM address */
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if (d->rom.base_addr && d->rom.size) {
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uint32_t bar_data = 0;
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/* Re-set BAR reported by OS, otherwise ROM can't be read. */
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if (xen_host_pci_get_long(d, PCI_ROM_ADDRESS, &bar_data)) {
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return 0;
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}
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if ((bar_data & PCI_ROM_ADDRESS_MASK) == 0) {
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bar_data |= d->rom.base_addr & PCI_ROM_ADDRESS_MASK;
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xen_host_pci_set_long(d, PCI_ROM_ADDRESS, bar_data);
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}
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s->bases[PCI_ROM_SLOT].access.maddr = d->rom.base_addr;
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memory_region_init_rom_device(&s->rom, NULL, NULL,
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"xen-pci-pt-rom", d->rom.size);
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pci_register_bar(&s->dev, PCI_ROM_SLOT, PCI_BASE_ADDRESS_MEM_PREFETCH,
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&s->rom);
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XEN_PT_LOG(&s->dev, "Expansion ROM registered (size=0x%08"PRIx64
|
||||
" base_addr=0x%08"PRIx64")\n",
|
||||
d->rom.size, d->rom.base_addr);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void xen_pt_unregister_regions(XenPCIPassthroughState *s)
|
||||
{
|
||||
XenHostPCIDevice *d = &s->real_device;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < PCI_NUM_REGIONS - 1; i++) {
|
||||
XenHostPCIIORegion *r = &d->io_regions[i];
|
||||
|
||||
if (r->base_addr == 0 || r->size == 0) {
|
||||
continue;
|
||||
}
|
||||
|
||||
memory_region_destroy(&s->bar[i]);
|
||||
}
|
||||
if (d->rom.base_addr && d->rom.size) {
|
||||
memory_region_destroy(&s->rom);
|
||||
}
|
||||
}
|
||||
|
||||
/* region mapping */
|
||||
|
||||
static int xen_pt_bar_from_region(XenPCIPassthroughState *s, MemoryRegion *mr)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < PCI_NUM_REGIONS - 1; i++) {
|
||||
if (mr == &s->bar[i]) {
|
||||
return i;
|
||||
}
|
||||
}
|
||||
if (mr == &s->rom) {
|
||||
return PCI_ROM_SLOT;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function checks if an io_region overlaps an io_region from another
|
||||
* device. The io_region to check is provided with (addr, size and type)
|
||||
* A callback can be provided and will be called for every region that is
|
||||
* overlapped.
|
||||
* The return value indicates if the region is overlappsed */
|
||||
struct CheckBarArgs {
|
||||
XenPCIPassthroughState *s;
|
||||
pcibus_t addr;
|
||||
pcibus_t size;
|
||||
uint8_t type;
|
||||
bool rc;
|
||||
};
|
||||
static void xen_pt_check_bar_overlap(PCIBus *bus, PCIDevice *d, void *opaque)
|
||||
{
|
||||
struct CheckBarArgs *arg = opaque;
|
||||
XenPCIPassthroughState *s = arg->s;
|
||||
uint8_t type = arg->type;
|
||||
int i;
|
||||
|
||||
if (d->devfn == s->dev.devfn) {
|
||||
return;
|
||||
}
|
||||
|
||||
/* xxx: This ignores bridges. */
|
||||
for (i = 0; i < PCI_NUM_REGIONS; i++) {
|
||||
const PCIIORegion *r = &d->io_regions[i];
|
||||
|
||||
if (!r->size) {
|
||||
continue;
|
||||
}
|
||||
if ((type & PCI_BASE_ADDRESS_SPACE_IO)
|
||||
!= (r->type & PCI_BASE_ADDRESS_SPACE_IO)) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (ranges_overlap(arg->addr, arg->size, r->addr, r->size)) {
|
||||
XEN_PT_WARN(&s->dev,
|
||||
"Overlapped to device [%02x:%02x.%d] Region: %i"
|
||||
" (addr: %#"FMT_PCIBUS", len: %#"FMT_PCIBUS")\n",
|
||||
pci_bus_num(bus), PCI_SLOT(d->devfn),
|
||||
PCI_FUNC(d->devfn), i, r->addr, r->size);
|
||||
arg->rc = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void xen_pt_region_update(XenPCIPassthroughState *s,
|
||||
MemoryRegionSection *sec, bool adding)
|
||||
{
|
||||
PCIDevice *d = &s->dev;
|
||||
MemoryRegion *mr = sec->mr;
|
||||
int bar = -1;
|
||||
int rc;
|
||||
int op = adding ? DPCI_ADD_MAPPING : DPCI_REMOVE_MAPPING;
|
||||
struct CheckBarArgs args = {
|
||||
.s = s,
|
||||
.addr = sec->offset_within_address_space,
|
||||
.size = sec->size,
|
||||
.rc = false,
|
||||
};
|
||||
|
||||
bar = xen_pt_bar_from_region(s, mr);
|
||||
if (bar == -1) {
|
||||
return;
|
||||
}
|
||||
|
||||
args.type = d->io_regions[bar].type;
|
||||
pci_for_each_device(d->bus, pci_bus_num(d->bus),
|
||||
xen_pt_check_bar_overlap, &args);
|
||||
if (args.rc) {
|
||||
XEN_PT_WARN(d, "Region: %d (addr: %#"FMT_PCIBUS
|
||||
", len: %#"FMT_PCIBUS") is overlapped.\n",
|
||||
bar, sec->offset_within_address_space, sec->size);
|
||||
}
|
||||
|
||||
if (d->io_regions[bar].type & PCI_BASE_ADDRESS_SPACE_IO) {
|
||||
uint32_t guest_port = sec->offset_within_address_space;
|
||||
uint32_t machine_port = s->bases[bar].access.pio_base;
|
||||
uint32_t size = sec->size;
|
||||
rc = xc_domain_ioport_mapping(xen_xc, xen_domid,
|
||||
guest_port, machine_port, size,
|
||||
op);
|
||||
if (rc) {
|
||||
XEN_PT_ERR(d, "%s ioport mapping failed! (rc: %i)\n",
|
||||
adding ? "create new" : "remove old", rc);
|
||||
}
|
||||
} else {
|
||||
pcibus_t guest_addr = sec->offset_within_address_space;
|
||||
pcibus_t machine_addr = s->bases[bar].access.maddr
|
||||
+ sec->offset_within_region;
|
||||
pcibus_t size = sec->size;
|
||||
rc = xc_domain_memory_mapping(xen_xc, xen_domid,
|
||||
XEN_PFN(guest_addr + XC_PAGE_SIZE - 1),
|
||||
XEN_PFN(machine_addr + XC_PAGE_SIZE - 1),
|
||||
XEN_PFN(size + XC_PAGE_SIZE - 1),
|
||||
op);
|
||||
if (rc) {
|
||||
XEN_PT_ERR(d, "%s mem mapping failed! (rc: %i)\n",
|
||||
adding ? "create new" : "remove old", rc);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void xen_pt_begin(MemoryListener *l)
|
||||
{
|
||||
}
|
||||
|
||||
static void xen_pt_commit(MemoryListener *l)
|
||||
{
|
||||
}
|
||||
|
||||
static void xen_pt_region_add(MemoryListener *l, MemoryRegionSection *sec)
|
||||
{
|
||||
XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,
|
||||
memory_listener);
|
||||
|
||||
xen_pt_region_update(s, sec, true);
|
||||
}
|
||||
|
||||
static void xen_pt_region_del(MemoryListener *l, MemoryRegionSection *sec)
|
||||
{
|
||||
XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,
|
||||
memory_listener);
|
||||
|
||||
xen_pt_region_update(s, sec, false);
|
||||
}
|
||||
|
||||
static void xen_pt_region_nop(MemoryListener *l, MemoryRegionSection *s)
|
||||
{
|
||||
}
|
||||
|
||||
static void xen_pt_log_fns(MemoryListener *l, MemoryRegionSection *s)
|
||||
{
|
||||
}
|
||||
|
||||
static void xen_pt_log_global_fns(MemoryListener *l)
|
||||
{
|
||||
}
|
||||
|
||||
static void xen_pt_eventfd_fns(MemoryListener *l, MemoryRegionSection *s,
|
||||
bool match_data, uint64_t data, int fd)
|
||||
{
|
||||
}
|
||||
|
||||
static const MemoryListener xen_pt_memory_listener = {
|
||||
.begin = xen_pt_begin,
|
||||
.commit = xen_pt_commit,
|
||||
.region_add = xen_pt_region_add,
|
||||
.region_nop = xen_pt_region_nop,
|
||||
.region_del = xen_pt_region_del,
|
||||
.log_start = xen_pt_log_fns,
|
||||
.log_stop = xen_pt_log_fns,
|
||||
.log_sync = xen_pt_log_fns,
|
||||
.log_global_start = xen_pt_log_global_fns,
|
||||
.log_global_stop = xen_pt_log_global_fns,
|
||||
.eventfd_add = xen_pt_eventfd_fns,
|
||||
.eventfd_del = xen_pt_eventfd_fns,
|
||||
.priority = 10,
|
||||
};
|
||||
|
||||
/* init */
|
||||
|
||||
static int xen_pt_initfn(PCIDevice *d)
|
||||
{
|
||||
XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d);
|
||||
int rc = 0;
|
||||
uint8_t machine_irq = 0;
|
||||
int pirq = XEN_PT_UNASSIGNED_PIRQ;
|
||||
|
||||
/* register real device */
|
||||
XEN_PT_LOG(d, "Assigning real physical device %02x:%02x.%d"
|
||||
" to devfn %#x\n",
|
||||
s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function,
|
||||
s->dev.devfn);
|
||||
|
||||
rc = xen_host_pci_device_get(&s->real_device,
|
||||
s->hostaddr.domain, s->hostaddr.bus,
|
||||
s->hostaddr.slot, s->hostaddr.function);
|
||||
if (rc) {
|
||||
XEN_PT_ERR(d, "Failed to \"open\" the real pci device. rc: %i\n", rc);
|
||||
return -1;
|
||||
}
|
||||
|
||||
s->is_virtfn = s->real_device.is_virtfn;
|
||||
if (s->is_virtfn) {
|
||||
XEN_PT_LOG(d, "%04x:%02x:%02x.%d is a SR-IOV Virtual Function\n",
|
||||
s->real_device.domain, bus, slot, func);
|
||||
}
|
||||
|
||||
/* Initialize virtualized PCI configuration (Extended 256 Bytes) */
|
||||
if (xen_host_pci_get_block(&s->real_device, 0, d->config,
|
||||
PCI_CONFIG_SPACE_SIZE) == -1) {
|
||||
xen_host_pci_device_put(&s->real_device);
|
||||
return -1;
|
||||
}
|
||||
|
||||
s->memory_listener = xen_pt_memory_listener;
|
||||
|
||||
/* Handle real device's MMIO/PIO BARs */
|
||||
xen_pt_register_regions(s);
|
||||
|
||||
/* Bind interrupt */
|
||||
if (!s->dev.config[PCI_INTERRUPT_PIN]) {
|
||||
XEN_PT_LOG(d, "no pin interrupt\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
machine_irq = s->real_device.irq;
|
||||
rc = xc_physdev_map_pirq(xen_xc, xen_domid, machine_irq, &pirq);
|
||||
|
||||
if (rc < 0) {
|
||||
XEN_PT_ERR(d, "Mapping machine irq %u to pirq %i failed, (rc: %d)\n",
|
||||
machine_irq, pirq, rc);
|
||||
|
||||
/* Disable PCI intx assertion (turn on bit10 of devctl) */
|
||||
xen_host_pci_set_word(&s->real_device,
|
||||
PCI_COMMAND,
|
||||
pci_get_word(s->dev.config + PCI_COMMAND)
|
||||
| PCI_COMMAND_INTX_DISABLE);
|
||||
machine_irq = 0;
|
||||
s->machine_irq = 0;
|
||||
} else {
|
||||
machine_irq = pirq;
|
||||
s->machine_irq = pirq;
|
||||
xen_pt_mapped_machine_irq[machine_irq]++;
|
||||
}
|
||||
|
||||
/* bind machine_irq to device */
|
||||
if (machine_irq != 0) {
|
||||
uint8_t e_intx = xen_pt_pci_intx(s);
|
||||
|
||||
rc = xc_domain_bind_pt_pci_irq(xen_xc, xen_domid, machine_irq,
|
||||
pci_bus_num(d->bus),
|
||||
PCI_SLOT(d->devfn),
|
||||
e_intx);
|
||||
if (rc < 0) {
|
||||
XEN_PT_ERR(d, "Binding of interrupt %i failed! (rc: %d)\n",
|
||||
e_intx, rc);
|
||||
|
||||
/* Disable PCI intx assertion (turn on bit10 of devctl) */
|
||||
xen_host_pci_set_word(&s->real_device, PCI_COMMAND,
|
||||
*(uint16_t *)(&s->dev.config[PCI_COMMAND])
|
||||
| PCI_COMMAND_INTX_DISABLE);
|
||||
xen_pt_mapped_machine_irq[machine_irq]--;
|
||||
|
||||
if (xen_pt_mapped_machine_irq[machine_irq] == 0) {
|
||||
if (xc_physdev_unmap_pirq(xen_xc, xen_domid, machine_irq)) {
|
||||
XEN_PT_ERR(d, "Unmapping of machine interrupt %i failed!"
|
||||
" (rc: %d)\n", machine_irq, rc);
|
||||
}
|
||||
}
|
||||
s->machine_irq = 0;
|
||||
}
|
||||
}
|
||||
|
||||
out:
|
||||
memory_listener_register(&s->memory_listener, NULL);
|
||||
XEN_PT_LOG(d, "Real physical device %02x:%02x.%d registered successfuly!\n",
|
||||
bus, slot, func);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int xen_pt_unregister_device(PCIDevice *d)
|
||||
{
|
||||
XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d);
|
||||
uint8_t machine_irq = s->machine_irq;
|
||||
uint8_t intx = xen_pt_pci_intx(s);
|
||||
int rc;
|
||||
|
||||
if (machine_irq) {
|
||||
rc = xc_domain_unbind_pt_irq(xen_xc, xen_domid, machine_irq,
|
||||
PT_IRQ_TYPE_PCI,
|
||||
pci_bus_num(d->bus),
|
||||
PCI_SLOT(s->dev.devfn),
|
||||
intx,
|
||||
0 /* isa_irq */);
|
||||
if (rc < 0) {
|
||||
XEN_PT_ERR(d, "unbinding of interrupt INT%c failed."
|
||||
" (machine irq: %i, rc: %d)"
|
||||
" But bravely continuing on..\n",
|
||||
'a' + intx, machine_irq, rc);
|
||||
}
|
||||
}
|
||||
|
||||
if (machine_irq) {
|
||||
xen_pt_mapped_machine_irq[machine_irq]--;
|
||||
|
||||
if (xen_pt_mapped_machine_irq[machine_irq] == 0) {
|
||||
rc = xc_physdev_unmap_pirq(xen_xc, xen_domid, machine_irq);
|
||||
|
||||
if (rc < 0) {
|
||||
XEN_PT_ERR(d, "unmapping of interrupt %i failed. (rc: %d)"
|
||||
" But bravely continuing on..\n",
|
||||
machine_irq, rc);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
xen_pt_unregister_regions(s);
|
||||
memory_listener_unregister(&s->memory_listener);
|
||||
|
||||
xen_host_pci_device_put(&s->real_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static Property xen_pci_passthrough_properties[] = {
|
||||
DEFINE_PROP_PCI_HOST_DEVADDR("hostaddr", XenPCIPassthroughState, hostaddr),
|
||||
DEFINE_PROP_END_OF_LIST(),
|
||||
};
|
||||
|
||||
static void xen_pci_passthrough_class_init(ObjectClass *klass, void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(klass);
|
||||
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
|
||||
|
||||
k->init = xen_pt_initfn;
|
||||
k->exit = xen_pt_unregister_device;
|
||||
k->config_read = xen_pt_pci_read_config;
|
||||
k->config_write = xen_pt_pci_write_config;
|
||||
dc->desc = "Assign an host PCI device with Xen";
|
||||
dc->props = xen_pci_passthrough_properties;
|
||||
};
|
||||
|
||||
static TypeInfo xen_pci_passthrough_info = {
|
||||
.name = "xen-pci-passthrough",
|
||||
.parent = TYPE_PCI_DEVICE,
|
||||
.instance_size = sizeof(XenPCIPassthroughState),
|
||||
.class_init = xen_pci_passthrough_class_init,
|
||||
};
|
||||
|
||||
static void xen_pci_passthrough_register_types(void)
|
||||
{
|
||||
type_register_static(&xen_pci_passthrough_info);
|
||||
}
|
||||
|
||||
type_init(xen_pci_passthrough_register_types)
|
||||
248
hw/xen_pt.h
Normal file
248
hw/xen_pt.h
Normal file
@ -0,0 +1,248 @@
|
||||
#ifndef XEN_PT_H
|
||||
#define XEN_PT_H
|
||||
|
||||
#include "qemu-common.h"
|
||||
#include "xen_common.h"
|
||||
#include "pci.h"
|
||||
#include "xen-host-pci-device.h"
|
||||
|
||||
void xen_pt_log(const PCIDevice *d, const char *f, ...) GCC_FMT_ATTR(2, 3);
|
||||
|
||||
#define XEN_PT_ERR(d, _f, _a...) xen_pt_log(d, "%s: Error: "_f, __func__, ##_a)
|
||||
|
||||
#ifdef XEN_PT_LOGGING_ENABLED
|
||||
# define XEN_PT_LOG(d, _f, _a...) xen_pt_log(d, "%s: " _f, __func__, ##_a)
|
||||
# define XEN_PT_WARN(d, _f, _a...) \
|
||||
xen_pt_log(d, "%s: Warning: "_f, __func__, ##_a)
|
||||
#else
|
||||
# define XEN_PT_LOG(d, _f, _a...)
|
||||
# define XEN_PT_WARN(d, _f, _a...)
|
||||
#endif
|
||||
|
||||
#ifdef XEN_PT_DEBUG_PCI_CONFIG_ACCESS
|
||||
# define XEN_PT_LOG_CONFIG(d, addr, val, len) \
|
||||
xen_pt_log(d, "%s: address=0x%04x val=0x%08x len=%d\n", \
|
||||
__func__, addr, val, len)
|
||||
#else
|
||||
# define XEN_PT_LOG_CONFIG(d, addr, val, len)
|
||||
#endif
|
||||
|
||||
|
||||
/* Helper */
|
||||
#define XEN_PFN(x) ((x) >> XC_PAGE_SHIFT)
|
||||
|
||||
typedef struct XenPTRegInfo XenPTRegInfo;
|
||||
typedef struct XenPTReg XenPTReg;
|
||||
|
||||
typedef struct XenPCIPassthroughState XenPCIPassthroughState;
|
||||
|
||||
/* function type for config reg */
|
||||
typedef int (*xen_pt_conf_reg_init)
|
||||
(XenPCIPassthroughState *, XenPTRegInfo *, uint32_t real_offset,
|
||||
uint32_t *data);
|
||||
typedef int (*xen_pt_conf_dword_write)
|
||||
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
||||
uint32_t *val, uint32_t dev_value, uint32_t valid_mask);
|
||||
typedef int (*xen_pt_conf_word_write)
|
||||
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
||||
uint16_t *val, uint16_t dev_value, uint16_t valid_mask);
|
||||
typedef int (*xen_pt_conf_byte_write)
|
||||
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
||||
uint8_t *val, uint8_t dev_value, uint8_t valid_mask);
|
||||
typedef int (*xen_pt_conf_dword_read)
|
||||
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
||||
uint32_t *val, uint32_t valid_mask);
|
||||
typedef int (*xen_pt_conf_word_read)
|
||||
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
||||
uint16_t *val, uint16_t valid_mask);
|
||||
typedef int (*xen_pt_conf_byte_read)
|
||||
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
||||
uint8_t *val, uint8_t valid_mask);
|
||||
|
||||
#define XEN_PT_BAR_ALLF 0xFFFFFFFF
|
||||
#define XEN_PT_BAR_UNMAPPED (-1)
|
||||
|
||||
|
||||
typedef enum {
|
||||
XEN_PT_GRP_TYPE_HARDWIRED = 0, /* 0 Hardwired reg group */
|
||||
XEN_PT_GRP_TYPE_EMU, /* emul reg group */
|
||||
} XenPTRegisterGroupType;
|
||||
|
||||
typedef enum {
|
||||
XEN_PT_BAR_FLAG_MEM = 0, /* Memory type BAR */
|
||||
XEN_PT_BAR_FLAG_IO, /* I/O type BAR */
|
||||
XEN_PT_BAR_FLAG_UPPER, /* upper 64bit BAR */
|
||||
XEN_PT_BAR_FLAG_UNUSED, /* unused BAR */
|
||||
} XenPTBarFlag;
|
||||
|
||||
|
||||
typedef struct XenPTRegion {
|
||||
/* BAR flag */
|
||||
XenPTBarFlag bar_flag;
|
||||
/* Translation of the emulated address */
|
||||
union {
|
||||
uint64_t maddr;
|
||||
uint64_t pio_base;
|
||||
uint64_t u;
|
||||
} access;
|
||||
} XenPTRegion;
|
||||
|
||||
/* XenPTRegInfo declaration
|
||||
* - only for emulated register (either a part or whole bit).
|
||||
* - for passthrough register that need special behavior (like interacting with
|
||||
* other component), set emu_mask to all 0 and specify r/w func properly.
|
||||
* - do NOT use ALL F for init_val, otherwise the tbl will not be registered.
|
||||
*/
|
||||
|
||||
/* emulated register infomation */
|
||||
struct XenPTRegInfo {
|
||||
uint32_t offset;
|
||||
uint32_t size;
|
||||
uint32_t init_val;
|
||||
/* reg read only field mask (ON:RO/ROS, OFF:other) */
|
||||
uint32_t ro_mask;
|
||||
/* reg emulate field mask (ON:emu, OFF:passthrough) */
|
||||
uint32_t emu_mask;
|
||||
/* no write back allowed */
|
||||
uint32_t no_wb;
|
||||
xen_pt_conf_reg_init init;
|
||||
/* read/write function pointer
|
||||
* for double_word/word/byte size */
|
||||
union {
|
||||
struct {
|
||||
xen_pt_conf_dword_write write;
|
||||
xen_pt_conf_dword_read read;
|
||||
} dw;
|
||||
struct {
|
||||
xen_pt_conf_word_write write;
|
||||
xen_pt_conf_word_read read;
|
||||
} w;
|
||||
struct {
|
||||
xen_pt_conf_byte_write write;
|
||||
xen_pt_conf_byte_read read;
|
||||
} b;
|
||||
} u;
|
||||
};
|
||||
|
||||
/* emulated register management */
|
||||
struct XenPTReg {
|
||||
QLIST_ENTRY(XenPTReg) entries;
|
||||
XenPTRegInfo *reg;
|
||||
uint32_t data; /* emulated value */
|
||||
};
|
||||
|
||||
typedef struct XenPTRegGroupInfo XenPTRegGroupInfo;
|
||||
|
||||
/* emul reg group size initialize method */
|
||||
typedef int (*xen_pt_reg_size_init_fn)
|
||||
(XenPCIPassthroughState *, const XenPTRegGroupInfo *,
|
||||
uint32_t base_offset, uint8_t *size);
|
||||
|
||||
/* emulated register group infomation */
|
||||
struct XenPTRegGroupInfo {
|
||||
uint8_t grp_id;
|
||||
XenPTRegisterGroupType grp_type;
|
||||
uint8_t grp_size;
|
||||
xen_pt_reg_size_init_fn size_init;
|
||||
XenPTRegInfo *emu_regs;
|
||||
};
|
||||
|
||||
/* emul register group management table */
|
||||
typedef struct XenPTRegGroup {
|
||||
QLIST_ENTRY(XenPTRegGroup) entries;
|
||||
const XenPTRegGroupInfo *reg_grp;
|
||||
uint32_t base_offset;
|
||||
uint8_t size;
|
||||
QLIST_HEAD(, XenPTReg) reg_tbl_list;
|
||||
} XenPTRegGroup;
|
||||
|
||||
|
||||
#define XEN_PT_UNASSIGNED_PIRQ (-1)
|
||||
|
||||
struct XenPCIPassthroughState {
|
||||
PCIDevice dev;
|
||||
|
||||
PCIHostDeviceAddress hostaddr;
|
||||
bool is_virtfn;
|
||||
XenHostPCIDevice real_device;
|
||||
XenPTRegion bases[PCI_NUM_REGIONS]; /* Access regions */
|
||||
QLIST_HEAD(, XenPTRegGroup) reg_grps;
|
||||
|
||||
uint32_t machine_irq;
|
||||
|
||||
MemoryRegion bar[PCI_NUM_REGIONS - 1];
|
||||
MemoryRegion rom;
|
||||
|
||||
MemoryListener memory_listener;
|
||||
};
|
||||
|
||||
int xen_pt_config_init(XenPCIPassthroughState *s);
|
||||
void xen_pt_config_delete(XenPCIPassthroughState *s);
|
||||
XenPTRegGroup *xen_pt_find_reg_grp(XenPCIPassthroughState *s, uint32_t address);
|
||||
XenPTReg *xen_pt_find_reg(XenPTRegGroup *reg_grp, uint32_t address);
|
||||
int xen_pt_bar_offset_to_index(uint32_t offset);
|
||||
|
||||
static inline pcibus_t xen_pt_get_emul_size(XenPTBarFlag flag, pcibus_t r_size)
|
||||
{
|
||||
/* align resource size (memory type only) */
|
||||
if (flag == XEN_PT_BAR_FLAG_MEM) {
|
||||
return (r_size + XC_PAGE_SIZE - 1) & XC_PAGE_MASK;
|
||||
} else {
|
||||
return r_size;
|
||||
}
|
||||
}
|
||||
|
||||
/* INTx */
|
||||
/* The PCI Local Bus Specification, Rev. 3.0,
|
||||
* Section 6.2.4 Miscellaneous Registers, pp 223
|
||||
* outlines 5 valid values for the interrupt pin (intx).
|
||||
* 0: For devices (or device functions) that don't use an interrupt in
|
||||
* 1: INTA#
|
||||
* 2: INTB#
|
||||
* 3: INTC#
|
||||
* 4: INTD#
|
||||
*
|
||||
* Xen uses the following 4 values for intx
|
||||
* 0: INTA#
|
||||
* 1: INTB#
|
||||
* 2: INTC#
|
||||
* 3: INTD#
|
||||
*
|
||||
* Observing that these list of values are not the same, xen_pt_pci_read_intx()
|
||||
* uses the following mapping from hw to xen values.
|
||||
* This seems to reflect the current usage within Xen.
|
||||
*
|
||||
* PCI hardware | Xen | Notes
|
||||
* ----------------+-----+----------------------------------------------------
|
||||
* 0 | 0 | No interrupt
|
||||
* 1 | 0 | INTA#
|
||||
* 2 | 1 | INTB#
|
||||
* 3 | 2 | INTC#
|
||||
* 4 | 3 | INTD#
|
||||
* any other value | 0 | This should never happen, log error message
|
||||
*/
|
||||
|
||||
static inline uint8_t xen_pt_pci_read_intx(XenPCIPassthroughState *s)
|
||||
{
|
||||
uint8_t v = 0;
|
||||
xen_host_pci_get_byte(&s->real_device, PCI_INTERRUPT_PIN, &v);
|
||||
return v;
|
||||
}
|
||||
|
||||
static inline uint8_t xen_pt_pci_intx(XenPCIPassthroughState *s)
|
||||
{
|
||||
uint8_t r_val = xen_pt_pci_read_intx(s);
|
||||
|
||||
XEN_PT_LOG(&s->dev, "intx=%i\n", r_val);
|
||||
if (r_val < 1 || r_val > 4) {
|
||||
XEN_PT_LOG(&s->dev, "Interrupt pin read from hardware is out of range:"
|
||||
" value=%i, acceptable range is 1 - 4\n", r_val);
|
||||
r_val = 0;
|
||||
} else {
|
||||
r_val -= 1;
|
||||
}
|
||||
|
||||
return r_val;
|
||||
}
|
||||
|
||||
#endif /* !XEN_PT_H */
|
||||
11
hw/xen_pt_config_init.c
Normal file
11
hw/xen_pt_config_init.c
Normal file
@ -0,0 +1,11 @@
|
||||
#include "xen_pt.h"
|
||||
|
||||
XenPTRegGroup *xen_pt_find_reg_grp(XenPCIPassthroughState *s, uint32_t address)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
XenPTReg *xen_pt_find_reg(XenPTRegGroup *reg_grp, uint32_t address)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
12
xen-all.c
12
xen-all.c
@ -1191,3 +1191,15 @@ void xen_register_framebuffer(MemoryRegion *mr)
|
||||
{
|
||||
framebuffer = mr;
|
||||
}
|
||||
|
||||
void xen_shutdown_fatal_error(const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
|
||||
va_start(ap, fmt);
|
||||
vfprintf(stderr, fmt, ap);
|
||||
va_end(ap);
|
||||
fprintf(stderr, "Will destroy the domain.\n");
|
||||
/* destroy the domain */
|
||||
qemu_system_shutdown_request();
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user