qemu/include/hw/ppc
Alexey Kardashevskiy ec132efaa8 spapr: Support NVIDIA V100 GPU with NVLink2
NVIDIA V100 GPUs have on-board RAM which is mapped into the host memory
space and accessible as normal RAM via an NVLink bus. The VFIO-PCI driver
implements special regions for such GPUs and emulates an NVLink bridge.
NVLink2-enabled POWER9 CPUs also provide address translation services
which includes an ATS shootdown (ATSD) register exported via the NVLink
bridge device.

This adds a quirk to VFIO to map the GPU memory and create an MR;
the new MR is stored in a PCI device as a QOM link. The sPAPR PCI uses
this to get the MR and map it to the system address space.
Another quirk does the same for ATSD.

This adds additional steps to sPAPR PHB setup:

1. Search for specific GPUs and NPUs, collect findings in
sPAPRPHBState::nvgpus, manage system address space mappings;

2. Add device-specific properties such as "ibm,npu", "ibm,gpu",
"memory-block", "link-speed" to advertise the NVLink2 function to
the guest;

3. Add "mmio-atsd" to vPHB to advertise the ATSD capability;

4. Add new memory blocks (with extra "linux,memory-usable" to prevent
the guest OS from accessing the new memory until it is onlined) and
npuphb# nodes representing an NPU unit for every vPHB as the GPU driver
uses it for link discovery.

This allocates space for GPU RAM and ATSD like we do for MMIOs by
adding 2 new parameters to the phb_placement() hook. Older machine types
set these to zero.

This puts new memory nodes in a separate NUMA node to as the GPU RAM
needs to be configured equally distant from any other node in the system.
Unlike the host setup which assigns numa ids from 255 downwards, this
adds new NUMA nodes after the user configures nodes or from 1 if none
were configured.

This adds requirement similar to EEH - one IOMMU group per vPHB.
The reason for this is that ATSD registers belong to a physical NPU
so they cannot invalidate translations on GPUs attached to another NPU.
It is guaranteed by the host platform as it does not mix NVLink bridges
or GPUs from different NPU in the same IOMMU group. If more than one
IOMMU group is detected on a vPHB, this disables ATSD support for that
vPHB and prints a warning.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[aw: for vfio portions]
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Message-Id: <20190312082103.130561-1-aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26 10:41:23 +10:00
..
fdt.h target/ppc: Pass cpu instead of env to ppc_create_page_sizes_prop() 2018-04-27 18:05:22 +10:00
mac_dbdma.h mac_dbdma: remove DBDMA_init() function 2017-09-27 13:05:41 +10:00
openpic_kvm.h openpic: move KVM-specific declarations into separate openpic_kvm.h file 2018-03-06 13:16:29 +11:00
openpic.h mac_newworld: simplify IRQ wiring 2018-12-21 09:24:23 +11:00
pnv_core.h ppc/pnv: POWER9 XSCOM quad support 2019-03-12 14:33:04 +11:00
pnv_lpc.h ppc/pnv: add SerIRQ routing registers 2019-03-12 14:33:04 +11:00
pnv_occ.h ppc/pnv: add a OCC model for POWER9 2019-03-12 14:33:04 +11:00
pnv_psi.h ppc/pnv: add a PSI bridge model for POWER9 2019-03-12 14:33:04 +11:00
pnv_xive.h ppc/pnv: add a XIVE interrupt controller model for POWER9 2019-03-12 14:33:04 +11:00
pnv_xscom.h ppc/pnv: POWER9 XSCOM quad support 2019-03-12 14:33:04 +11:00
pnv.h ppc/pnv: POWER9 XSCOM quad support 2019-03-12 14:33:04 +11:00
ppc4xx.h ppc4xx: Use ram_addr_t in ppc4xx_sdram_adjust() 2019-02-04 18:44:17 +11:00
ppc_e500.h intc/openpic: Build openpic only once 2013-07-09 21:33:02 +02:00
ppc.h ppc: externalize ppc_get_vcpu_by_pir() 2019-03-12 14:33:04 +11:00
spapr_cpu_core.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_drc.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_irq.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_ovec.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_rtas.h tests: add RTAS command in the protocol 2016-09-23 10:29:40 +10:00
spapr_vio.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_xive.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr.h spapr: Support NVIDIA V100 GPU with NVLink2 2019-04-26 10:41:23 +10:00
xics_spapr.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
xics.h xics: Write source state to KVM at claim time 2019-02-26 09:21:25 +11:00
xive_regs.h ppc/xive: introduce a simplified XIVE presenter 2018-12-21 09:37:04 +11:00
xive.h ppc/pnv: export the xive_router_notify() routine 2019-03-12 14:33:04 +11:00