Nathan Froyd ea63e2c358 target-mips: move ROTR and ROTRV inside gen_shift_{imm, } ...

It's easier to implement mips16 shift instructions if we're not
examining the opcode inside gen_shift_{imm,}.  So move ROTR and ROTRV
and do the special-case handling of SRL and SRLV inside decode_opc.
Likewise for their 64-bit counterparts.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

2009-12-13 20:20:19 +01:00

..

cpu.h

target-mips: add new HFLAGs for JALX and 16/32-bit delay slots

2009-12-13 20:20:19 +01:00

exec.h

…

helper.c

target-mips: change interrupt bits to be mips16-aware

2009-12-13 20:20:19 +01:00

helper.h

target-mips: use physical address in lladdr

2009-11-30 16:18:28 +01:00

machine.c

target-mips: rename CP0_LLAddr into lladdr

2009-11-22 14:12:13 +01:00

mips-defs.h

…

op_helper.c

target-mips: change interrupt bits to be mips16-aware

2009-12-13 20:20:19 +01:00

TODO

…

translate_init.c

target-mips: make CP0_LLAddr register CPU dependent

2009-11-22 14:12:19 +01:00

translate.c

target-mips: move ROTR and ROTRV inside gen_shift_{imm, }

2009-12-13 20:20:19 +01:00