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b888c78070
qemu/target/i386
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Paolo Bonzini b888c78070 target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bits 
Right now, QEMU is using the "feature" and "bits" fields of ExtSaveArea
to query the accelerator for the support status of extended save areas.
This is a problem for AVX10, which attaches two feature bits (AVX512F
and AVX10) to the same extended save states.

To keep the AVX10 hacks to the minimum, limit usage of esa->features
and esa->bits.  Instead, just query the accelerator for the 0xD leaf.
Do it in common code and clear esa->size if an extended save state is
unsupported.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20241031085233.425388-3-tao1.su@linux.intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-31 18:28:33 +01:00
..
hvf target/i386/hvf: fix handling of XSAVE-related CPUID bits 2024-10-31 18:28:32 +01:00
kvm target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bits 2024-10-31 18:28:33 +01:00
nvmm cpu: move Qemu[Thread|Cond] setup into common code 2024-06-04 10:02:39 +02:00
tcg target/i386: use + to put flags together 2024-10-31 18:28:33 +01:00
whpx cpu: move Qemu[Thread|Cond] setup into common code 2024-06-04 10:02:39 +02:00
arch_dump.c dump: Replace opaque DumpState pointer with a typed one 2022-10-06 19:30:43 +04:00
arch_memory_mapping.c memory: follow Error API guidelines 2023-10-19 23:13:27 +02:00
confidential-guest.c target/i386: introduce x86-confidential-guest 2024-04-23 17:35:25 +02:00
confidential-guest.h target/i386: add support for masking CPUID features in confidential guests 2024-07-04 07:47:11 +02:00
cpu-apic.c target/i386: Move APIC related code to cpu-apic.c 2024-04-25 10:12:54 +02:00
cpu-dump.c target/i386: remove CC_OP_CLR 2024-10-31 18:28:33 +01:00
cpu-internal.h i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
cpu-param.h license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later 2024-09-20 10:11:59 +03:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu-sysemu.c target/i386: Move APIC related code to cpu-apic.c 2024-04-25 10:12:54 +02:00
cpu.c target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bits 2024-10-31 18:28:33 +01:00
cpu.h target/i386: Wrap cc_op_live with a validity check 2024-10-31 18:28:33 +01:00
gdbstub.c target/i386/gdbstub: Expose orig_ax 2024-10-13 10:05:51 -07:00
helper.c i386: Fix MCE support for AMD hosts 2024-06-08 10:33:38 +02:00
helper.h target/i386: optimize computation of ZF from CC_OP_DYNAMIC 2024-10-31 18:28:33 +01:00
host-cpu.c i386/cpu: Drop the check of phys_bits in host_cpu_realizefn() 2024-10-31 18:28:32 +01:00
host-cpu.h accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
Kconfig i386: select correct components for no-board build 2024-05-10 15:45:15 +02:00
machine.c target/i386: Add support save/load HWCR MSR 2024-10-17 12:30:21 +02:00
meson.build target/i386: Move APIC related code to cpu-apic.c 2024-04-25 10:12:54 +02:00
monitor.c target/i386: Move APIC related code to cpu-apic.c 2024-04-25 10:12:54 +02:00
ops_sse.h target/i386: set CC_OP in helpers if they want CC_OP_EFLAGS 2024-05-25 13:28:01 +02:00
sev-sysemu-stub.c hw/i386/sev: Add support to encrypt BIOS when SEV-SNP is enabled 2024-06-05 11:01:06 +02:00
sev.c qapi/crypto: Rename QCryptoHashAlgorithm to *Algo, and drop prefix 2024-09-10 14:02:16 +02:00
sev.h hw/i386/sev: Add support to encrypt BIOS when SEV-SNP is enabled 2024-06-05 11:01:06 +02:00
svm.h target/i386: check intercept for XSETBV 2023-10-17 15:20:53 +02:00
trace-events target/i386/sev: Use size_t for object sizes 2024-06-28 19:26:54 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xsave_helper.c x86: add support for KVM_CAP_XSAVE2 and AMX state migration 2022-03-15 11:50:50 +01:00