target/i386: Move APIC related code to cpu-apic.c
Move APIC related code split in cpu-sysemu.c and monitor.c to cpu-apic.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20240321154838.95771-4-philmd@linaro.org>
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target/i386/cpu-apic.c
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112
target/i386/cpu-apic.c
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@ -0,0 +1,112 @@
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/*
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* QEMU x86 CPU <-> APIC
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* SPDX-License-Identifier: MIT
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*/
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#include "qemu/osdep.h"
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#include "qapi/qmp/qdict.h"
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#include "qapi/error.h"
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#include "monitor/monitor.h"
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#include "monitor/hmp-target.h"
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#include "sysemu/hw_accel.h"
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#include "sysemu/kvm.h"
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#include "sysemu/xen.h"
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#include "exec/address-spaces.h"
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#include "hw/qdev-properties.h"
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#include "hw/i386/apic_internal.h"
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#include "cpu-internal.h"
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APICCommonClass *apic_get_class(Error **errp)
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{
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const char *apic_type = "apic";
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/* TODO: in-kernel irqchip for hvf */
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if (kvm_enabled()) {
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if (!kvm_irqchip_in_kernel()) {
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error_setg(errp, "KVM does not support userspace APIC");
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return NULL;
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}
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apic_type = "kvm-apic";
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} else if (xen_enabled()) {
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apic_type = "xen-apic";
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} else if (whpx_apic_in_platform()) {
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apic_type = "whpx-apic";
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}
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return APIC_COMMON_CLASS(object_class_by_name(apic_type));
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}
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void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
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{
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APICCommonState *apic;
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APICCommonClass *apic_class = apic_get_class(errp);
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if (!apic_class) {
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return;
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}
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cpu->apic_state = DEVICE(object_new_with_class(OBJECT_CLASS(apic_class)));
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object_property_add_child(OBJECT(cpu), "lapic",
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OBJECT(cpu->apic_state));
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object_unref(OBJECT(cpu->apic_state));
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/* TODO: convert to link<> */
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apic = APIC_COMMON(cpu->apic_state);
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apic->cpu = cpu;
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apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE;
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/*
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* apic_common_set_id needs to check if the CPU has x2APIC
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* feature in case APIC ID >= 255, so we need to set apic->cpu
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* before setting APIC ID
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*/
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qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id);
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}
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void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
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{
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APICCommonState *apic;
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static bool apic_mmio_map_once;
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if (cpu->apic_state == NULL) {
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return;
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}
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qdev_realize(DEVICE(cpu->apic_state), NULL, errp);
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/* Map APIC MMIO area */
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apic = APIC_COMMON(cpu->apic_state);
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if (!apic_mmio_map_once) {
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memory_region_add_subregion_overlap(get_system_memory(),
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apic->apicbase &
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MSR_IA32_APICBASE_BASE,
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&apic->io_memory,
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0x1000);
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apic_mmio_map_once = true;
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}
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}
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void hmp_info_local_apic(Monitor *mon, const QDict *qdict)
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{
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CPUState *cs;
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if (qdict_haskey(qdict, "apic-id")) {
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int id = qdict_get_try_int(qdict, "apic-id", 0);
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cs = cpu_by_arch_id(id);
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if (cs) {
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cpu_synchronize_state(cs);
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}
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} else {
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cs = mon_get_cpu(mon);
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}
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if (!cs) {
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monitor_printf(mon, "No CPU available\n");
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return;
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}
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x86_cpu_dump_local_apic_state(cs, CPU_DUMP_FPU);
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}
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@ -19,19 +19,12 @@
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "sysemu/kvm.h"
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#include "sysemu/xen.h"
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#include "sysemu/whpx.h"
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#include "qapi/error.h"
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#include "qapi/qapi-visit-run-state.h"
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#include "qapi/qmp/qdict.h"
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#include "qapi/qobject-input-visitor.h"
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#include "qom/qom-qobject.h"
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#include "qapi/qapi-commands-machine-target.h"
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#include "hw/qdev-properties.h"
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#include "exec/address-spaces.h"
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#include "hw/i386/apic_internal.h"
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#include "cpu-internal.h"
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@ -273,75 +266,6 @@ void x86_cpu_machine_reset_cb(void *opaque)
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cpu_reset(CPU(cpu));
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}
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APICCommonClass *apic_get_class(Error **errp)
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{
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const char *apic_type = "apic";
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/* TODO: in-kernel irqchip for hvf */
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if (kvm_enabled()) {
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if (!kvm_irqchip_in_kernel()) {
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error_setg(errp, "KVM does not support userspace APIC");
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return NULL;
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}
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apic_type = "kvm-apic";
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} else if (xen_enabled()) {
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apic_type = "xen-apic";
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} else if (whpx_apic_in_platform()) {
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apic_type = "whpx-apic";
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}
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return APIC_COMMON_CLASS(object_class_by_name(apic_type));
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}
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void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
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{
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APICCommonState *apic;
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APICCommonClass *apic_class = apic_get_class(errp);
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if (!apic_class) {
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return;
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}
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cpu->apic_state = DEVICE(object_new_with_class(OBJECT_CLASS(apic_class)));
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object_property_add_child(OBJECT(cpu), "lapic",
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OBJECT(cpu->apic_state));
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object_unref(OBJECT(cpu->apic_state));
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/* TODO: convert to link<> */
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apic = APIC_COMMON(cpu->apic_state);
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apic->cpu = cpu;
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apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE;
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/*
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* apic_common_set_id needs to check if the CPU has x2APIC
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* feature in case APIC ID >= 255, so we need to set apic->cpu
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* before setting APIC ID
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*/
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qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id);
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}
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void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
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{
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APICCommonState *apic;
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static bool apic_mmio_map_once;
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if (cpu->apic_state == NULL) {
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return;
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}
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qdev_realize(DEVICE(cpu->apic_state), NULL, errp);
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/* Map APIC MMIO area */
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apic = APIC_COMMON(cpu->apic_state);
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if (!apic_mmio_map_once) {
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memory_region_add_subregion_overlap(get_system_memory(),
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apic->apicbase &
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MSR_IA32_APICBASE_BASE,
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&apic->io_memory,
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0x1000);
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apic_mmio_map_once = true;
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}
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}
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GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs)
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{
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X86CPU *cpu = X86_CPU(cs);
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@ -385,4 +309,3 @@ void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v,
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errp);
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qapi_free_GuestPanicInformation(panic_info);
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}
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@ -18,6 +18,7 @@ i386_system_ss.add(files(
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'arch_memory_mapping.c',
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'machine.c',
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'monitor.c',
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'cpu-apic.c',
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'cpu-sysemu.c',
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))
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i386_system_ss.add(when: 'CONFIG_SEV', if_true: files('sev.c'), if_false: files('sev-sysemu-stub.c'))
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@ -28,8 +28,6 @@
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#include "monitor/hmp-target.h"
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#include "monitor/hmp.h"
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#include "qapi/qmp/qdict.h"
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#include "sysemu/hw_accel.h"
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#include "sysemu/kvm.h"
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#include "qapi/error.h"
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#include "qapi/qapi-commands-misc-target.h"
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#include "qapi/qapi-commands-misc.h"
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@ -647,26 +645,3 @@ const MonitorDef *target_monitor_defs(void)
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{
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return monitor_defs;
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}
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void hmp_info_local_apic(Monitor *mon, const QDict *qdict)
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{
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CPUState *cs;
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if (qdict_haskey(qdict, "apic-id")) {
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int id = qdict_get_try_int(qdict, "apic-id", 0);
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cs = cpu_by_arch_id(id);
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if (cs) {
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cpu_synchronize_state(cs);
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}
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} else {
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cs = mon_get_cpu(mon);
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}
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if (!cs) {
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monitor_printf(mon, "No CPU available\n");
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return;
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}
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x86_cpu_dump_local_apic_state(cs, CPU_DUMP_FPU);
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}
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