qemu/mips at b3c5077befaebf2281515f36ddbf482f3e0818aa - qemu

History

Paolo Bonzini dfae46c3ba target/mips: tcg: detect out-of-bounds accesses to cpu_gpr and cpu_gpr_hi

In some cases (for example gen_compute_branch_nm in
nanomips_translate.c.inc) registers can be unused
on some paths and a negative value is passed in that case:

        gen_compute_branch_nm(ctx, OPC_BPOSGE32, 4, -1, -2,
                              imm << 1);

To avoid an out of bounds access in those cases, introduce
assertions.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2023-04-20 11:17:35 +02:00

sysemu

target/mips: Replace [g_]assert(0) -> g_assert_not_reached()

2023-03-07 18:08:12 +01:00

tcg

target/mips: tcg: detect out-of-bounds accesses to cpu_gpr and cpu_gpr_hi

2023-04-20 11:17:35 +02:00

cpu-defs.c.inc

target/mips: Set correct CP0.Config[4, 5] values for M14K(c)

2023-03-08 00:37:48 +01:00

cpu-param.h

target/mips: Remove NB_MMU_MODES define