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mips: Remove support for trap and emulate KVM

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This support was limited to the Malta board, drop it.
I do not have a machine that can run VZ KVM, so I am assuming
that it works for -M malta as well.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221221091718.71844-1-philmd@linaro.org>
This commit is contained in:
Paolo Bonzini 2022-12-18 01:06:45 +01:00 committed by Philippe Mathieu-Daudé
parent c12b1e67d5
commit a844873512
9 changed files with 18 additions and 100 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
docs/about/deprecated.rst
View File

@ -171,15 +171,6 @@ accepted incorrect commands will return an error. Users should make sure that
all arguments passed to ``device_add`` are consistent with the documented
property types.
System accelerators
-------------------
MIPS ``Trap-and-Emul`` KVM support (since 6.0)
''''''''''''''''''''''''''''''''''''''''''''''
The MIPS ``Trap-and-Emul`` KVM host and guest support has been removed
from Linux upstream kernel, declare it deprecated.
Host Architectures
------------------

9
docs/about/removed-features.rst
View File

@ -652,6 +652,15 @@ Userspace local APIC with KVM (x86, removed 8.0)
a local APIC. The ``split`` setting is supported, as is using ``-M
kernel-irqchip=off`` when the CPU does not have a local APIC.
System accelerators
-------------------
MIPS "Trap-and-Emulate" KVM support (removed in 8.0)
''''''''''''''''''''''''''''''''''''''''''''''''''''
The MIPS "Trap-and-Emulate" KVM host and guest support was removed
from Linux in 2021, and is not supported anymore by QEMU either.
System emulator machines
------------------------

46
hw/mips/malta.c
View File

@ -57,6 +57,7 @@
#include "semihosting/semihost.h"
#include "hw/mips/cps.h"
#include "hw/qdev-clock.h"
#include "target/mips/internal.h"
#include "trace.h"
#define ENVP_PADDR 0x2000
@ -875,7 +876,6 @@ static uint64_t load_kernel(void)
uint32_t *prom_buf;
long prom_size;
int prom_index = 0;
uint64_t (*xlate_to_kseg0) (void *opaque, uint64_t addr);
uint8_t rng_seed[32];
char rng_seed_hex[sizeof(rng_seed) * 2 + 1];
size_t rng_seed_prom_offset;
@ -899,19 +899,10 @@ static uint64_t load_kernel(void)
}
/* Check where the kernel has been linked */
if (kernel_entry & 0x80000000ll) {
if (kvm_enabled()) {
error_report("KVM guest kernels must be linked in useg. "
"Did you forget to enable CONFIG_KVM_GUEST?");
exit(1);
}
xlate_to_kseg0 = cpu_mips_phys_to_kseg0;
} else {
/* if kernel entry is in useg it is probably a KVM T&E kernel */
mips_um_ksegs_enable();
xlate_to_kseg0 = cpu_mips_kvm_um_phys_to_kseg0;
if (kernel_entry <= USEG_LIMIT) {
error_report("Trap-and-Emul kernels (Linux CONFIG_KVM_GUEST)"
" are not supported");
exit(1);
}
/* load initrd */
@ -952,7 +943,7 @@ static uint64_t load_kernel(void)
if (initrd_size > 0) {
prom_set(prom_buf, prom_index++,
"rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
xlate_to_kseg0(NULL, initrd_offset),
cpu_mips_phys_to_kseg0(NULL, initrd_offset),
initrd_size, loaderparams.kernel_cmdline);
} else {
prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline);
@ -1019,11 +1010,6 @@ static void main_cpu_reset(void *opaque)
}
malta_mips_config(cpu);
if (kvm_enabled()) {
/* Start running from the bootloader we wrote to end of RAM */
env->active_tc.PC = 0x40000000 + loaderparams.ram_low_size;
}
}
static void create_cpu_without_cps(MachineState *ms, MaltaState *s,
@ -1157,13 +1143,7 @@ void mips_malta_init(MachineState *machine)
fl_idx++;
if (kernel_filename) {
ram_low_size = MIN(ram_size, 256 * MiB);
/* For KVM we reserve 1MB of RAM for running bootloader */
if (kvm_enabled()) {
ram_low_size -= 0x100000;
bootloader_run_addr = cpu_mips_kvm_um_phys_to_kseg0(NULL, ram_low_size);
} else {
bootloader_run_addr = cpu_mips_phys_to_kseg0(NULL, RESET_ADDRESS);
}
bootloader_run_addr = cpu_mips_phys_to_kseg0(NULL, RESET_ADDRESS);
/* Write a small bootloader to the flash location. */
loaderparams.ram_size = ram_size;
@ -1180,20 +1160,8 @@ void mips_malta_init(MachineState *machine)
write_bootloader_nanomips(memory_region_get_ram_ptr(bios),
bootloader_run_addr, kernel_entry);
}
if (kvm_enabled()) {
/* Write the bootloader code @ the end of RAM, 1MB reserved */
write_bootloader(memory_region_get_ram_ptr(ram_low_preio) +
ram_low_size,
bootloader_run_addr, kernel_entry);
}
} else {
target_long bios_size = FLASH_SIZE;
/* The flash region isn't executable from a KVM guest */
if (kvm_enabled()) {
error_report("KVM enabled but no -kernel argument was specified. "
"Booting from flash is not supported with KVM.");
exit(1);
}
/* Load firmware from flash. */
if (!dinfo) {
/* Load a BIOS image. */

7
target/mips/cpu.c
View File

@ -292,12 +292,7 @@ static void mips_cpu_reset_hold(Object *obj)
env->tlb->tlb_in_use = env->tlb->nb_tlb;
env->CP0_Wired = 0;
env->CP0_GlobalNumber = (cs->cpu_index & 0xFF) << CP0GN_VPId;
env->CP0_EBase = (cs->cpu_index & 0x3FF);
if (mips_um_ksegs_enabled()) {
env->CP0_EBase |= 0x40000000;
} else {
env->CP0_EBase |= (int32_t)0x80000000;
}
env->CP0_EBase = KSEG0_BASE | (cs->cpu_index & 0x3FF);
if (env->CP0_Config3 & (1 << CP0C3_CMGCR)) {
env->CP0_CMGCRBase = 0x1fbf8000 >> 4;
}

3
target/mips/cpu.h
View File

@ -1296,11 +1296,8 @@ void cpu_set_exception_base(int vp_index, target_ulong address);
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr);
uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr);
bool mips_um_ksegs_enabled(void);
void mips_um_ksegs_enable(void);
#if !defined(CONFIG_USER_ONLY)

3
target/mips/internal.h
View File

@ -99,9 +99,6 @@ int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
#define KSEG2_BASE ((target_ulong)(int32_t)0xC0000000UL)
#define KSEG3_BASE ((target_ulong)(int32_t)0xE0000000UL)
#define KVM_KSEG0_BASE ((target_ulong)(int32_t)0x40000000UL)
#define KVM_KSEG2_BASE ((target_ulong)(int32_t)0x60000000UL)
#if !defined(CONFIG_USER_ONLY)
enum {

11
target/mips/kvm.c
View File

@ -1268,25 +1268,16 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
int mips_kvm_type(MachineState *machine, const char *vm_type)
{
#if defined(KVM_CAP_MIPS_VZ) || defined(KVM_CAP_MIPS_TE)
#if defined(KVM_CAP_MIPS_VZ)
int r;
KVMState *s = KVM_STATE(machine->accelerator);
#endif
#if defined(KVM_CAP_MIPS_VZ)
r = kvm_check_extension(s, KVM_CAP_MIPS_VZ);
if (r > 0) {
return KVM_VM_MIPS_VZ;
}
#endif
#if defined(KVM_CAP_MIPS_TE)
r = kvm_check_extension(s, KVM_CAP_MIPS_TE);
if (r > 0) {
return KVM_VM_MIPS_TE;
}
#endif
return -1;
}

17
target/mips/sysemu/addr.c
View File

@ -23,8 +23,6 @@
#include "qemu/osdep.h"
#include "cpu.h"
static int mips_um_ksegs;
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
{
return addr & 0x1fffffffll;
@ -35,11 +33,6 @@ uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
return addr | ~0x7fffffffll;
}
uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr)
{
return addr | 0x40000000ll;
}
uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr)
{
return addr & 0x1fffffffll;
@ -49,13 +42,3 @@ uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr)
{
return (addr & 0x1fffffffll) | 0xffffffffa0000000ll;
}
bool mips_um_ksegs_enabled(void)
{
return mips_um_ksegs;
}
void mips_um_ksegs_enable(void)
{
mips_um_ksegs = 1;
}

13
target/mips/sysemu/physaddr.c
View File

@ -130,19 +130,6 @@ int get_physical_address(CPUMIPSState *env, hwaddr *physical,
/* effective address (modified for KVM T&E kernel segments) */
target_ulong address = real_address;
if (mips_um_ksegs_enabled()) {
/* KVM T&E adds guest kernel segments in useg */
if (real_address >= KVM_KSEG0_BASE) {
if (real_address < KVM_KSEG2_BASE) {
/* kseg0 */
address += KSEG0_BASE - KVM_KSEG0_BASE;
} else if (real_address <= USEG_LIMIT) {
/* kseg2/3 */
address += KSEG2_BASE - KVM_KSEG2_BASE;
}
}
}
if (address <= USEG_LIMIT) {
/* useg */
uint16_t segctl;