5d337540c4
According to the datasheet of ASPEED SOCs, each I2C bus has their own pool buffer since AST2500. Only AST2400 utilized a pool buffer share to all I2C bus. And firmware required to set the offset of pool buffer by writing "Function Control Register(I2CD 00)" To make this model more readable, will change to introduce a new bus pool buffer attribute in AspeedI2Cbus. So, it does not need to calculate the pool buffer offset for different I2C bus. This patch rename the I2C class pool attribute to share_pool. It make user more understand share pool and bus pool are different. Incrementing the version of aspeed_i2c_vmstate to 3. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> |
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allwinner-i2c.h | ||
arm_sbcon_i2c.h | ||
aspeed_i2c.h | ||
bcm2835_i2c.h | ||
bitbang_i2c.h | ||
i2c_mux_pca954x.h | ||
i2c.h | ||
imx_i2c.h | ||
microbit_i2c.h | ||
npcm7xx_smbus.h | ||
pm_smbus.h | ||
pmbus_device.h | ||
pnv_i2c_regs.h | ||
ppc4xx_i2c.h | ||
smbus_eeprom.h | ||
smbus_master.h | ||
smbus_slave.h |