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qemu/hw/intc
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Damien Hedde 2958e5150d gicv3: fix ICH_MISR's LRENP computation 
According to the "Arm Generic Interrupt Controller Architecture
Specification GIC architecture version 3 and 4" (version G: page 345
for aarch64 or 509 for aarch32):
LRENP bit of ICH_MISR is set when ICH_HCR.LRENPIE==1 and
ICH_HCR.EOIcount is non-zero.

When only LRENPIE was set (and EOI count was zero), the LRENP bit was
wrongly set and MISR value was wrong.

As an additional consequence, if an hypervisor set ICH_HCR.LRENPIE,
the maintenance interrupt was constantly fired. It happens since patch
9cee1efe92 ("hw/intc: Set GIC maintenance interrupt level to only 0 or 1")
which fixed another bug about maintenance interrupt (most significant
bits of misr, including this one, were ignored in the interrupt trigger).

Fixes: 83f036fe3d ("hw/intc/arm_gicv3: Add accessors for ICH_ system registers")
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20211207094427.3473-1-damien.hedde@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-12-07 15:30:08 +00:00
..
allwinner-a10-pic.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
apic_common.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
apic.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
arm_gic_common.c arm_gic: Mask the un-supported priority bits 2020-02-28 16:14:57 +00:00
arm_gic_kvm.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
arm_gic.c hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register 2021-02-02 17:00:55 +00:00
arm_gicv2m.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arm_gicv3_common.c hw/intc/arm_gicv3: Support multiple redistributor regions 2021-11-15 16:12:59 +00:00
arm_gicv3_cpuif.c gicv3: fix ICH_MISR's LRENP computation 2021-12-07 15:30:08 +00:00
arm_gicv3_dist.c hw/intc: GICv3 ITS Feature enablement 2021-09-13 21:01:08 +01:00
arm_gicv3_its_common.c hw/intc/arm_gicv3_its: Revert version increments in vmstate_its 2021-11-22 18:17:19 +00:00
arm_gicv3_its_kvm.c hw/intc: GICv3 ITS initial framework 2021-09-13 16:07:54 +01:00
arm_gicv3_its.c hw/intc: cannot clear GICv3 ITS CTLR[Enabled] bit 2021-11-26 16:54:09 +00:00
arm_gicv3_kvm.c hw/intc/arm_gicv3: Support multiple redistributor regions 2021-11-15 16:12:59 +00:00
arm_gicv3_redist.c hw/intc/arm_gicv3: Update cached state after LPI state changes 2021-11-26 16:57:51 +00:00
arm_gicv3.c hw/intc/arm_gicv3: Update cached state after LPI state changes 2021-11-26 16:57:51 +00:00
armv7m_nvic.c arm: Move system PPB container handling to armv7m 2021-09-01 11:08:18 +01:00
aspeed_vic.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
bcm2835_ic.c hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers 2020-10-20 16:12:00 +01:00
bcm2836_control.c hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers 2020-10-20 16:12:00 +01:00
etraxfs_pic.c hw: Replace anti-social QOM type names 2021-03-19 15:18:43 +01:00
exynos4210_combiner.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
exynos4210_gic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
gic_internal.h hw/intc/arm_gic: Drop GIC_BASE_IRQ macro 2018-09-25 15:13:24 +01:00
gicv3_internal.h hw/intc/arm_gicv3: Add new gicv3_intid_is_special() function 2021-11-26 16:58:57 +00:00
goldfish_pic.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
grlib_irqmp.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
heathrow_pic.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
i8259_common.c isa: Convert uses of isa_create() with Coccinelle 2020-06-15 22:05:28 +02:00
i8259.c hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable 2021-03-19 08:48:18 -04:00
imx_avic.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
imx_gpcv2.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
intc.c intc: add an interface to gather statistics/informations on interrupt controllers 2016-10-04 10:00:25 +02:00
ioapic_common.c nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
ioapic.c Remove superfluous timer_del() calls 2021-01-08 15:13:38 +00:00
Kconfig hw/intc: Rename sifive_clint sources to riscv_aclint sources 2021-09-21 07:56:49 +10:00
loongson_liointc.c hw/intc/loongson_liointc: Fix per core ISR handling 2021-02-21 18:41:46 +01:00
m68k_irqc.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
meson.build hw/intc: Remove the Ibex PLIC 2021-10-22 23:35:47 +10:00
mips_gic.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
omap_intc.c omap_intc: Use typedef name for instance_size 2020-09-09 13:20:22 -04:00
ompic.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
openpic_kvm.c memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
openpic.c hw/intc: openpic: Clean up the styles 2021-09-30 12:26:06 +10:00
pl190.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
pnv_xive_regs.h ppc/pnv: add a XIVE interrupt controller model for POWER9 2019-03-12 14:33:04 +11:00
pnv_xive.c ppc/pnv: Add trace events for PCI event notification 2021-02-10 10:43:50 +11:00
ppc-uic.c misc: Correct relative include path 2021-06-05 21:10:42 +02:00
realview_gic.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
riscv_aclint.c hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT 2021-09-21 07:56:49 +10:00
rx_icu.c hw/intc: fix heap-buffer-overflow in rxicu_realize() 2020-11-23 10:41:58 +00:00
s390_flic_kvm.c target/s390x: move kvm files into kvm/ 2021-07-07 14:01:59 +02:00
s390_flic.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
sh_intc.c hw/intc/sh_intc: Remove unneeded local variable initialisers 2021-10-30 18:39:37 +02:00
sifive_plic.c hw/intc: sifive_plic: Cleanup the irq_request function 2021-10-22 23:35:47 +10:00
slavio_intctl.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
spapr_xive_kvm.c spapr/xive: Use xive_esb_rw() to trigger interrupts 2021-10-21 11:42:47 +11:00
spapr_xive.c spapr/xive: Add source status helpers 2021-10-21 11:42:47 +11:00
trace-events hw/sh4: Change debug printfs to traces 2021-10-30 18:39:37 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
vgic_common.h intc/gic: Extract some reusable vGIC code 2015-09-24 01:29:36 +01:00
xics_kvm.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xics_pnv.c non-virt: Fix Lesser GPL version number 2020-11-15 16:38:24 +01:00
xics_spapr.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xics.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xilinx_intc.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xive.c spapr/xive: Add source status helpers 2021-10-21 11:42:47 +11:00
xlnx-pmu-iomod-intc.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
xlnx-zynqmp-ipi.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00