Commit Graph

87747 Commits

Author SHA1 Message Date
Richard Henderson
f2b46c7162 tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec
NEON has 3 instructions implementing this 4 argument operation,
with each insn overlapping a different logical input onto the
destination register.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
dbbeff7764 tcg/arm: Implement TCG_TARGET_HAS_minmax_vec
This is minimum and maximum, signed and unsigned.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
4fcd301707 tcg/arm: Implement TCG_TARGET_HAS_sat_vec
This is saturating add and subtract, signed and unsigned.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
752b17693e tcg/arm: Implement TCG_TARGET_HAS_mul_vec
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
d4c4e9c51b tcg/arm: Implement TCG_TARGET_HAS_shi_vec
This consists of the three immediate shifts: shli, shri, sari.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
7df44cf6e9 tcg/arm: Implement andc, orc, abs, neg, not vector operations
These logical and arithmetic operations are optional, but are
trivial to accomplish with the existing infrastructure.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
d74b86ed4a tcg/arm: Implement minimal vector operations
Implementing dup2, add, sub, and, or, xor as the minimal set.
This allows us to actually enable neon in the header file.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
213e8d8473 tcg/arm: Implement tcg_out_dup*_vec
Most of dupi is copied from tcg/aarch64, which has the same
encoding for AdvSimdExpandImm.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
2df2a8cf77 tcg/arm: Implement tcg_out_mov for vector types
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
6e49fad23f tcg/arm: Implement tcg_out_ld/st for vector types
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
000cf4777a tcg/arm: Add host vector framework
Add registers and function stubs.  The functionality
is disabled via use_neon_instructions defined to 0.

We must still include results for the mandatory opcodes in
tcg_target_op_def, as all opcodes are checked during tcg init.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Richard Henderson
a4fbbd779a tcg: Change parameters for tcg_target_const_match
Change the return value to bool, because that's what is should
have been from the start.  Pass the ct mask instead of the whole
TCGArgConstraint, as that's the only part that's relevant.

Change the value argument to int64_t.  We will need the extra
width for 32-bit hosts wanting to match vector constants.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-04 11:50:11 -07:00
Peter Maydell
1cbd2d9149 -----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
 
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Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging

# gpg: Signature made Fri 04 Jun 2021 08:26:16 BST
# gpg:                using RSA key EF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 215D 46F4 8246 689E C77F  3562 EF04 965B 398D 6211

* remotes/jasowang/tags/net-pull-request:
  MAINTAINERS: Added eBPF maintainers information.
  docs: Added eBPF documentation.
  virtio-net: Added eBPF RSS to virtio-net.
  ebpf: Added eBPF RSS loader.
  ebpf: Added eBPF RSS program.
  net: Added SetSteeringEBPF method for NetClientState.
  net/tap: Added TUNSETSTEERINGEBPF code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-04 13:38:49 +01:00
Peter Maydell
5a95f5ce3c Finish conversion of float128 and floatx80 to FloatParts.
Implement float128_muladd and float128_{min,max}*.
 Optimize int-to-float conversion with hard-float.
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Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-fpu-20210603' into staging

Finish conversion of float128 and floatx80 to FloatParts.
Implement float128_muladd and float128_{min,max}*.
Optimize int-to-float conversion with hard-float.

# gpg: Signature made Thu 03 Jun 2021 22:13:10 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-fpu-20210603: (29 commits)
  softfloat: Use hard-float for {u}int64_to_float{32,64}
  tests/fp: Enable more tests
  softfloat: Convert modrem operations to FloatParts
  softfloat: Move floatN_log2 to softfloat-parts.c.inc
  softfloat: Convert float32_exp2 to FloatParts
  softfloat: Convert floatx80 compare to FloatParts
  softfloat: Convert floatx80_scalbn to FloatParts
  softfloat: Convert floatx80 to integer to FloatParts
  softfloat: Convert floatx80 float conversions to FloatParts
  softfloat: Convert integer to floatx80 to FloatParts
  softfloat: Convert floatx80_round_to_int to FloatParts
  softfloat: Convert floatx80_round to FloatParts
  softfloat: Convert floatx80_sqrt to FloatParts
  softfloat: Convert floatx80_div to FloatParts
  softfloat: Convert floatx80_mul to FloatParts
  softfloat: Convert floatx80_add/sub to FloatParts
  tests/fp/fp-test: Reverse order of floatx80 precision tests
  softfloat: Adjust parts_uncanon_normal for floatx80
  softfloat: Introduce Floatx80RoundPrec
  softfloat: Reduce FloatFmt
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-04 10:04:11 +01:00
Andrew Melnychenko
90322e646e MAINTAINERS: Added eBPF maintainers information.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2021-06-04 15:25:46 +08:00
Andrew Melnychenko
946456200e docs: Added eBPF documentation.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2021-06-04 15:25:46 +08:00
Andrew Melnychenko
0145c39348 virtio-net: Added eBPF RSS to virtio-net.
When RSS is enabled the device tries to load the eBPF program
to select RX virtqueue in the TUN. If eBPF can be loaded
the RSS will function also with vhost (works with kernel 5.8 and later).
Software RSS is used as a fallback with vhost=off when eBPF can't be loaded
or when hash population requested by the guest.

Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2021-06-04 15:25:46 +08:00
Andrew Melnychenko
46627f41b6 ebpf: Added eBPF RSS loader.
Added function that loads RSS eBPF program.
Added stub functions for RSS eBPF loader.
Added meson and configuration options.

By default, eBPF feature enabled if libbpf is present in the build system.
libbpf checked in configuration shell script and meson script.

Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2021-06-04 15:25:46 +08:00
Andrew Melnychenko
f3fa412de2 ebpf: Added eBPF RSS program.
RSS program and Makefile to build it.
The bpftool used to generate '.h' file.
The data in that file may be loaded by libbpf.
EBPF compilation is not required for building qemu.
You can use Makefile if you need to regenerate rss.bpf.skeleton.h.

Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2021-06-04 15:25:46 +08:00
Andrew Melnychenko
8f364e344c net: Added SetSteeringEBPF method for NetClientState.
For now, that method supported only by Linux TAP.
Linux TAP uses TUNSETSTEERINGEBPF ioctl.

Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2021-06-04 15:25:46 +08:00
Andrew Melnychenko
78258debe0 net/tap: Added TUNSETSTEERINGEBPF code.
Additional code that will be used for eBPF setting steering routine.

Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2021-06-04 15:25:46 +08:00
Richard Henderson
5d0204b82a softfloat: Use hard-float for {u}int64_to_float{32,64}
For the normal case of no additional scaling, this reduces the
profile contribution of int64_to_float64 to the testcase in the
linked issue from 0.81% to 0.04%.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/134
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:03 -07:00
Alex Bennée
90d004524e tests/fp: Enable more tests
Fix the trivial typo in extF80_lt_quiet, and re-enable
all of the floatx80 tests that are now fixed.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <87bl9iyahr.fsf@linaro.org>
[rth: Squash the fix for lt_quiet, and enable that too.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:03 -07:00
Richard Henderson
feaf2e9c06 softfloat: Convert modrem operations to FloatParts
Rename to parts$N_modrem.  This was the last use of a lot
of the legacy infrastructure, so remove it as required.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
2fa3546c8f softfloat: Move floatN_log2 to softfloat-parts.c.inc
Rename to parts$N_log2.  Though this is partly a ruse, since I do not
believe the code will succeed for float128 without work.  Which is ok
for now, because we do not need this for more than float32 and float64.

Since berkeley-testfloat-3 doesn't support log2, compare float64_log2
vs the system log2.  Fix the errors for inputs near 1.0:

test: 3ff00000000000b0  +0x1.00000000000b0p+0
  sf: 3d2fa00000000000  +0x1.fa00000000000p-45
libm: 3d2fbd422b1bd36f  +0x1.fbd422b1bd36fp-45
Error in fraction: 32170028290927 ulp

test: 3feec24f6770b100  +0x1.ec24f6770b100p-1
  sf: bfad3740d13c9ec0  -0x1.d3740d13c9ec0p-5
libm: bfad3740d13c9e98  -0x1.d3740d13c9e98p-5
Error in fraction: 40 ulp

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
572c4d862f softfloat: Convert float32_exp2 to FloatParts
Keep the intermediate results in FloatParts instead of
converting back and forth between float64.  Use muladd
instead of separate mul+add.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
1b96b006d2 softfloat: Convert floatx80 compare to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
872e6991f0 softfloat: Convert floatx80_scalbn to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
a1fc527bfb softfloat: Convert floatx80 to integer to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
8ae5719cd4 softfloat: Convert floatx80 float conversions to FloatParts
This is the last use of commonNaNT and all of the routines
that use it, so remove all of them for Werror.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
5f9529006e softfloat: Convert integer to floatx80 to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
f9a95a7800 softfloat: Convert floatx80_round_to_int to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
45a76b71ab softfloat: Convert floatx80_round to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
aa5e19ccbd softfloat: Convert floatx80_sqrt to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
38db99e282 softfloat: Convert floatx80_div to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
153f664a74 softfloat: Convert floatx80_mul to FloatParts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
c1b6299be1 softfloat: Convert floatx80_add/sub to FloatParts
Since this is the first such, this includes all of the
packing and unpacking routines as well.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
7ccae4ce7e tests/fp/fp-test: Reverse order of floatx80 precision tests
Many qemu softfloat will check floatx80_rounding_precision
even when berkeley testfloat will not.  So begin with
floatx80_precision_x, so that's the one we use
when !FUNC_EFF_ROUNDINGPRECISION.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
98b3cff753 softfloat: Adjust parts_uncanon_normal for floatx80
With floatx80_precision_x, the rounding happens across
the break between words.  Notice this case with

  frac_lsb = round_mask + 1 -> 0

and check the bits in frac_hi as needed.

In addition, since frac_shift == 0, we won't implicitly clear
round_mask via the right-shift, so explicitly clear those bits.
This fixes rounding for floatx80_precision_[sd].

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:09:02 -07:00
Richard Henderson
8da5f1dbb0 softfloat: Introduce Floatx80RoundPrec
Use an enumeration instead of raw 32/64/80 values.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:04:02 -07:00
Richard Henderson
d6e1f0cd59 softfloat: Reduce FloatFmt
Remove frac_lsb, frac_lsbm1, roundeven_mask.  Compute
these from round_mask in parts$N_uncanon_normal.

With floatx80, round_mask will not be tied to frac_shift.
Everything else is easily computable.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:04:02 -07:00
Richard Henderson
25fdedf0d3 softfloat: Split out parts_uncanon_normal
We will need to treat the non-normal cases of floatx80 specially,
so split out the normal case that we can reuse.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 14:04:02 -07:00
Richard Henderson
9261b245f0 softfloat: Move sqrt_float to softfloat-parts.c.inc
Rename to parts$N_sqrt.
Reimplement float128_sqrt with FloatParts128.

Reimplement with the inverse sqrt newton-raphson algorithm from musl.
This is significantly faster than even the berkeley sqrt n-r algorithm,
because it does not use division instructions, only multiplication.

Ordinarily, changing algorithms at the same time as migrating code is
a bad idea, but this is the only way I found that didn't break one of
the routines at the same time.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00
Richard Henderson
39626b0ce8 softfloat: Move scalbn_decomposed to softfloat-parts.c.inc
Rename to parts$N_scalbn.
Reimplement float128_scalbn with FloatParts128.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00
Richard Henderson
6eb169b89a softfloat: Move compare_floats to softfloat-parts.c.inc
Rename to parts$N_compare.  Rename all of the intermediate
functions to ftype_do_compare.  Rename the hard-float functions
to ftype_hs_compare.  Convert float128 to FloatParts128.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00
David Hildenbrand
ceebc129e5 softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag)
The float128 implementation is straight-forward.
Unfortuantely, we don't have any tests we can simply adjust/unlock.

Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20210517142739.38597-24-david@redhat.com>
[rth: Update for changed parts_minmax return value]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00
Richard Henderson
e1c4667a9b softfloat: Move minmax_flags to softfloat-parts.c.inc
Rename to parts$N_minmax.  Combine 3 bool arguments to a bitmask.
Introduce ftype_minmax functions as a common optimization point.
Fold bfloat16 expansions into the same macro as the other types.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00
Richard Henderson
37c954a1b9 softfloat: Move uint_to_float to softfloat-parts.c.inc
Rename to parts$N_uint_to_float.
Reimplement uint64_to_float128 with FloatParts128.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00
Richard Henderson
e368951998 softfloat: Move int_to_float to softfloat-parts.c.inc
Rename to parts$N_sint_to_float.
Reimplement int{32,64}_to_float128 with FloatParts128.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00
Richard Henderson
4ab4aef018 softfloat: Move round_to_uint_and_pack to softfloat-parts.c.inc
Rename to parts$N_float_to_uint.  Reimplement
float128_to_uint{32,64}{_round_to_zero} with FloatParts128.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-03 13:59:34 -07:00