Commit Graph

40706 Commits

Author SHA1 Message Date
Peter Maydell
df92cfa60e hw/intc/arm_gic: Running priority is group priority, not full priority
Priority values for the GIC are divided into a "group priority"
and a "subpriority" (with the division being determined by the
binary point register). The running priority is only determined
by the group priority of the active interrupts, not the
subpriority. In particular, this means that there can't be more
than one active interrupt at any particular group priority.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1438089748-5528-3-git-send-email-peter.maydell@linaro.org
2015-09-08 17:38:42 +01:00
Peter Maydell
b06c262b45 armv7m_nvic: Implement ICSR without using internal GIC state
Change the implementation of the Interrupt Control and State Register
in the v7M NVIC to not use the running_irq and last_active internal
state fields in the GIC. These fields don't correspond to state in
a real GIC and will be removed soon.
The changes to the ICSR are:
 * the VECTACTIVE field is documented as identical to the IPSR[8:0]
   field, so implement it that way
 * implement RETTOBASE via looking at the active state bits

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1438089748-5528-2-git-send-email-peter.maydell@linaro.org
2015-09-08 17:38:42 +01:00
Richard Henderson
8611280505 target-microblaze: Use setcond for pcmp*
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-09-08 08:49:33 +02:00
Richard Henderson
88174019d2 target-cris: Use movcond and setcond
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-09-08 08:48:34 +02:00
Peter Maydell
9d34158a5a s390x fixes and improvements:
- various bugfixes (css/event-facility)
 - more efficient adapter interrupt routes setup
 - gdb enhancement
 - sclp got treated with a lot of remodelling/cleanup
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Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20150907' into staging

s390x fixes and improvements:
- various bugfixes (css/event-facility)
- more efficient adapter interrupt routes setup
- gdb enhancement
- sclp got treated with a lot of remodelling/cleanup

# gpg: Signature made Mon 07 Sep 2015 15:42:43 BST using RSA key ID C6F02FAF
# gpg: Good signature from "Cornelia Huck <huckc@linux.vnet.ibm.com>"
# gpg:                 aka "Cornelia Huck <cornelia.huck@de.ibm.com>"

* remotes/cohuck/tags/s390x-20150907: (23 commits)
  s390/sclp: simplify calculation of rnmax
  s390/sclp: store the increment_size in the sclp device
  s390: unify allocation of initial memory
  s390: move memory calculation into the sclp device
  s390/sclp: ignore memory hotplug operations if it is disabled
  s390: disallow memory hotplug for the s390-virtio machine
  s390: no need to manually parse for slots and maxmem
  s390/sclp: move sclp_service_interrupt into the sclp device
  s390/sclp: move sclp_execute related functions into the SCLP class
  s390/sclp: introduce a root sclp device
  s390/sclp: temporarily fix unassignment/reassignment of memory subregions
  s390/sclp: replace sclp event types with proper defines
  s390/sclp: rework sclp event facility initialization + device realization
  sclp/s390: rework sclp cpu hotplug device notification
  s390x/gdb: support reading/writing of control registers
  s390x/kvm: make setting of in-kernel irq routes more efficient
  pc-bios/s390-ccw: rebuild image
  pc-bios/s390-ccw: Device detection in higher subchannel sets
  s390x/event-facility: fix location of receive mask
  s390x/css: start with cleared cstat/dstat
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 16:07:47 +01:00
David Hildenbrand
bd80a8ad55 s390/sclp: simplify calculation of rnmax
rnmax can be directly calculated using machine->maxram_size.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:44 +02:00
David Hildenbrand
71a2fd355d s390/sclp: store the increment_size in the sclp device
Let's calculate it once and reuse it.

Suggested-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:44 +02:00
David Hildenbrand
80d23275e3 s390: unify allocation of initial memory
Now that the calculation of the initial memory is hidden in the sclp
device, we can unify the allocation of the initial memory.

The remaining ugly part is the reserved memory for the virtio queues,
but that can be cleaned up later.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:44 +02:00
David Hildenbrand
1cf065fb87 s390: move memory calculation into the sclp device
The restrictions for memory calculation belong to the sclp device.

Let's move the calculation to that point, so we are able to unify it for
both s390 machines. The sclp device is the first device to be initialized.
It performs the calculation and safely stores it in the machine, where
other parts of the system can access an reuse it.

The memory hotplug device is now only created when it is really needed.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:44 +02:00
David Hildenbrand
b02ef3d92b s390/sclp: ignore memory hotplug operations if it is disabled
If no memory hotplug device was created, the sclp command facility is
not exposed (SCLP_FC_ASSIGN_ATTACH_READ_STOR). We therefore have no
memory hotplug and should correctly report SCLP_RC_INVALID_SCLP_COMMAND
if any such command is executed.

This gets rid of these ugly asserts that could have been triggered
for the s390-virtio machine.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:44 +02:00
David Hildenbrand
2998ffee24 s390: disallow memory hotplug for the s390-virtio machine
That machine type doesn't currently support memory hotplug, so let's abort
if it is requested. Reason is, that the virtio queues are allocated for now
at the end of the initial ram - extending the ram is therefore not possible.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:44 +02:00
David Hildenbrand
311467f77e s390: no need to manually parse for slots and maxmem
ram_slots and maxram_size has already been parsed and verified by
common code for us.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:44 +02:00
David Hildenbrand
1723a1b631 s390/sclp: move sclp_service_interrupt into the sclp device
Let's make that function a method of the new sclp device, keeping
the wrapper for existing users.

We can now let go of get_event_facility().

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
David Hildenbrand
25a3c5af57 s390/sclp: move sclp_execute related functions into the SCLP class
Let's move the sclp_execute related functions into the SCLP class
and pass the device state as parameter, so we have easy access to
the SCLPDevice later on.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
David Hildenbrand
515190d9da s390/sclp: introduce a root sclp device
Let's create a root sclp device, which has other sclp devices as
children (e.g. the event facility for now) and can later be used
for migration of sclp specific attributes and setup of memory.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
David Hildenbrand
732bdd383e s390/sclp: temporarily fix unassignment/reassignment of memory subregions
Commit 374f2981d1 ("memory: protect current_map by RCU") broke
unassignment of standby memory on s390x. Looks like that the new
parallelism allows races with our (semi broken) memory hotplug code. The
flatview_unref() can now be executed after our unparenting. Therefore
memory_region_unref() tries to unreference the MemoryRegion itself instead
of the parent.

In theory, MemoryRegions are now bound to separate devices that control
their lifetime. We don't have this yet, so we really want to control their
lifetime manually.

This patch fixes it temporarily, until we have a proper rework. The only
drawback is that they won't pop up in "info qom-tree", but that's better
than qemu crashes.

We have to release the reference to a memory region after a
memory_region_find, as it automatically takes a reference. As we're now
able to reassign memory, the MemoryRegion is in fact deleted (otherwise
vmstate_register_ram() would complain).

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
David Hildenbrand
35925a7a73 s390/sclp: replace sclp event types with proper defines
Introduce TYPE_SCLP_QUIESCE and make use of it. Also use
TYPE_SCLP_CPU_HOTPLUG where applicable.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
David Hildenbrand
f6102c329c s390/sclp: rework sclp event facility initialization + device realization
The current code only works by chance. The event facility is a sysbus
device, but specifies in its class structure as parent the DeviceClass
(instead of a device class).

The init function in return lies therefore at the same position as
the init function of SysBusDeviceClass and gets triggered instead -
a very bad idea of doing that (e.g. the parameter types don't match).

Let's bring the initialization code up to date, initializing the event
facility + child events in .instance_init and moving the realization of
the child events out of the init call, into the realization step.

Device realization is now automatically performed when the event facility
itself is realized. That realization implicitly triggers realization of
the child bus, which in turn initializes the events.

Please note that we have to manually propagate the realization of the bus
children, common code still has a TODO set for that task.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
David Hildenbrand
073f57ae34 sclp/s390: rework sclp cpu hotplug device notification
Let's get rid of this strange local variable + irq logic and
work directly on the QOM. (hint: what happens if two such devices
are created?)

We could introduce proper QOM class + state for the cpu hotplug device,
however that would result in too much overhead for a simple
"trigger_signal" function.

Also remove one unnecessary class function initialization.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
David Hildenbrand
5b9f6345a6 s390x/gdb: support reading/writing of control registers
Let's support reading and writing of control registers for kvm and tcg.

We have to take care of flushing the tlb (tcg) and pushing the changed
registers into kvm.

Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
Jens Freimann
c0194a00b0 s390x/kvm: make setting of in-kernel irq routes more efficient
When we add new adapter routes we call kvm_irqchip_add_route() for every
virtqueue and in the same step also do the KVM_SET_GSI_ROUTING ioctl.

This is unnecessary costly as the interface allows us to set multiple
routes in one go. Let's first add all routes to the table stored in the
global kvm_state and then do the ioctl to commit the routes to the
in-kernel irqchip.

This saves us several ioctls to the kernel where for each call a list
is reallocated and populated.

Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
Cornelia Huck
9f70b85c40 pc-bios/s390-ccw: rebuild image
Contains:
- Device detection in higher subchannel sets

Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
Alexander Yarygin
0f79b89bc2 pc-bios/s390-ccw: Device detection in higher subchannel sets
If no bootdevice was specified, we try to autodetect a suitable IPL
device. Current code only searched in subchannel set 0; extend this
search to higher subchannel sets as well.

Signed-off-by: Alexander Yarygin <yarygin@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
Cornelia Huck
f7822aa8b6 s390x/event-facility: fix location of receive mask
For read event mask, we assumed that the layout of the sccb was

|sccb header|event buffer header|receive mask|...|

The correct layout, however, is

|sccb header|receive mask|...|

as in-buffer and

|sccb header|event buffer header|...|

as out-buffer.

Fix this: This makes selective read work.

Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:43 +02:00
Cornelia Huck
6b7741c2be s390x/css: start with cleared cstat/dstat
When executing the start function, we should start with a clear state
regarding subchannel and device status; it is easy to forget updating one
of them after the ccw has been processed.

Note that we don't need to care about resetting the various control
fields: They are cleared by tsch(), and if they were still pending,
we wouldn't be able to execute the start function in the first
place.

Also note that we don't want to clear cstat/dstat if a suspended
subchannel is resumed.

This fixes a bug where we would continue to present channel-program
check in cstat even though later ccw requests for the subchannel
finished without error (i.e. cstat should be 0).

Cc: qemu-stable@nongnu.org
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
2015-09-07 16:10:43 +02:00
Cornelia Huck
3335ddddf9 s390x/event-facility: fix receive mask check
For selective read event, we need to check if any event is requested
that is not active instead of whether none of the requested events is
active.

Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Reviewed-by: Eric Farman <farman@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:42 +02:00
Cornelia Huck
fa4463e043 s390x/css: ccw-0 enforces count > 0
Type-0 ccws need to have a count > 0 for any command other than TIC.
Generate a channel-program check if this is not the case.

Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:42 +02:00
Pierre Morel
fde8206b80 s390x/css: handle ccw-0 TIC correctly
In CCW-0 format TIC command 4 highest bits are ignored in the subchannel.
In CCW-1 format the TIC command 4 highest bits must be 0.
To convert TIC from CCW-0 to CCW-1 we clear the 4 highest bits
to guarantee compatibility.

Signed-off-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07 16:10:42 +02:00
Peter Maydell
8f1ed5f508 Make pow2ceil() and pow2floor() inline
Since the pow2floor() function is now used in a hot code path,
make it inline; for consistency, provide pow2ceil() as an inline
function too.

Because these functions use ctz64() we have to put the inline
versions into host-utils.h, so they have access to ctz64(),
and move the inline is_power_of_2() along with them.

We then need to include host-utils.h from qemu-common.h so that
the files which use these functions via qemu-common.h still have
access to them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1437741192-20955-7-git-send-email-peter.maydell@linaro.org
2015-09-07 14:19:01 +01:00
Peter Maydell
10944a1920 Remove unused qemu_fls function
Nothing uses qemu_fls() any more, so delete it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1437741192-20955-6-git-send-email-peter.maydell@linaro.org
2015-09-07 14:19:00 +01:00
Peter Maydell
6554f5c037 exec.c: Use pow2floor() rather than hand-calculation
Use pow2floor() to round down to the nearest power of 2,
rather than an inline calculation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1437741192-20955-5-git-send-email-peter.maydell@linaro.org
2015-09-07 14:19:00 +01:00
Peter Maydell
26efcec158 hw/block/nvme.c: Use pow2ceil() rather than hand-calculation
Use pow2ceil() to round up to the next power of 2, rather
than an inline calculation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1437741192-20955-4-git-send-email-peter.maydell@linaro.org
2015-09-07 14:19:00 +01:00
Peter Maydell
1d0148fe6c hw/virtio/virtio-pci: Use pow2ceil() rather than hand-calculation
Use the utility function pow2ceil() for rounding up to the next
largest power of 2, rather than inline calculation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 1437741192-20955-3-git-send-email-peter.maydell@linaro.org
2015-09-07 14:19:00 +01:00
Peter Maydell
9bff5d8135 hw/pci: Use pow2ceil() rather than hand-calculation
A couple of places in hw/pci use an inline calculation to round a
size up to the next largest power of 2. We have a utility routine
for this, so use it.

(The behaviour of the old code is different if the size value
is 0 -- it would leave it as 0 rather than rounding up to 1,
but in both cases we know the size can't be 0.
In the case where the size value had bit 31 set, the old code
would invoke undefined behaviour; the new code will give a
result of 0. Presumably that could never happen either.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 1437741192-20955-2-git-send-email-peter.maydell@linaro.org
2015-09-07 14:19:00 +01:00
Peter Maydell
4169198617 Block layer patches
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Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches

# gpg: Signature made Fri 04 Sep 2015 20:45:33 BST using RSA key ID C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"

* remotes/kevin/tags/for-upstream:
  quorum: validate vote threshold against num_children even if read-pattern is fifo
  qcow2: reorder fields in Qcow2CachedTable to reduce padding
  docs: document how to configure the qcow2 L2/refcount caches
  qcow2: add option to clean unused cache entries after some time
  qcow2: mark the memory as no longer needed after qcow2_cache_empty()
  iotests: Warn if python subprocess is killed
  iotests: Do not suppress segfaults in bash tests
  iotests: Respect -nodefaults in tests 41 and 55
  iotests: More options for VM.add_drive()
  qemu-img: Fix crash in amend invocation
  block/raw-posix: Use raw_normalize_devicepath()
  qemu-iotests: s390x: fix test 130
  qemu-iotests: s390x: fix test 049, reject negative sizes in QemuOpts
  qemu-iotests: s390x: fix test 041 and 055
  qemu-iotests: disable default qemu devices for cross-platform compatibility
  qemu-iotests: qemu machine type support

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 11:23:08 +01:00
Peter Maydell
298fae3897 target-arm queue:
* cleanup to use g_new() and friends
  * support semihosting in A64
  * add SMBIOS support to mach-virt
  * remove hw_error() usages
  * fix bug in the AArch32:AArch64 register mapping
  * add a second PCI memory window in highmem on virt board
  * fix bug in arm_excp_unmasked()
  * add i.MX31 SoC
  * remove restriction on handling affinity values in virt board
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150907' into staging

target-arm queue:
 * cleanup to use g_new() and friends
 * support semihosting in A64
 * add SMBIOS support to mach-virt
 * remove hw_error() usages
 * fix bug in the AArch32:AArch64 register mapping
 * add a second PCI memory window in highmem on virt board
 * fix bug in arm_excp_unmasked()
 * add i.MX31 SoC
 * remove restriction on handling affinity values in virt board

# gpg: Signature made Mon 07 Sep 2015 10:40:48 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"

* remotes/pmaydell/tags/pull-target-arm-20150907: (27 commits)
  arm/virt: Add full-sized CPU affinity handling
  target-arm: Refactor CPU affinity handling
  i.MX: Add i2C devices to i.MX31 SOC
  i.MX: Add qtest support for I2C device emulator.
  i.MX: Add the i.MX25 PDK platform
  i.MX: Add SOC support for i.MX25
  i.MX: Add FEC Ethernet Emulator
  i.MX: Add I2C controller emulator
  i.MX: KZM: use standalone i.MX31 SOC support
  i.MX: Add SOC support for i.MX31
  target-arm: Fix arm_excp_unmasked() function
  hw/arm/virt: Add high MMIO PCI region, 512G in size
  target-arm: Fix AArch32:AArch64 general-purpose register mapping
  arm: Remove hw_error() usages.
  arm: cpu: assert() on no-EL2 virt IRQ error condition.
  smbios: implement smbios support for mach-virt
  smbios: add smbios 3.0 support
  target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction
  target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block
  target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:43:18 +01:00
Pavel Fedin
8d45c54d4f arm/virt: Add full-sized CPU affinity handling
At least with KVM, currently there's no reason why QEMU would not be
capable of handling Aff3 != 0. This commit fixes up FDT creation in such
a case.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Message-id: eef5a86e6d9a313780dbc23b35fcb65df42a3e9e.1441366248.git.p.fedin@samsung.com
[PMM: folded two overlong lines]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:31 +01:00
Pavel Fedin
0f4a9e45ec target-arm: Refactor CPU affinity handling
Introduces reusable definitions for CPU affinity masks/shifts and gets rid
of hardcoded magic numbers.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Message-id: 7e6def4d0d91ae64615cdd2035b94d408d0a23c6.1441366248.git.p.fedin@samsung.com
[PMM: folded overlong line]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:31 +01:00
Jean-Christophe Dubois
d4e26d106a i.MX: Add i2C devices to i.MX31 SOC
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: fb20e6bf5cf946c4530b2cfb55c7e37f5a0fc051.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:31 +01:00
Jean-Christophe Dubois
7f3986278b i.MX: Add qtest support for I2C device emulator.
This is using a ds1338 RTC chip on the I2C bus. This RTC chip is
not present on the real 3DS PDK board.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Acked-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 05601683a2a95c881cbc9f22651a044d969bd0ae.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:31 +01:00
Jean-Christophe Dubois
65f57c4363 i.MX: Add the i.MX25 PDK platform
Tested by booting a minimal Linux system on the emulated platform
Tested by booting the Xvisor hypervisor on the emulated platform

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: d27347300d253509d921bc27a6d0a14db877478b.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:31 +01:00
Jean-Christophe Dubois
ee708c999d i.MX: Add SOC support for i.MX25
For now we support the following devices:
      * CPU: ARM926
      * Interrupt Controller: AVIC
      * CCM
      * UART x 5
      * EPIT x 2
      * GPT x 4
      * FEC
      * I2C x 3

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 62218bfa90f9101f79098e768c3d58bd92dcb7f3.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:30 +01:00
Jean-Christophe Dubois
fcbd8018e6 i.MX: Add FEC Ethernet Emulator
This is based on mcf_fec.c FEC implementation for Coldfire

  * A generic PHY was added (borrowwed from LAN9118)
  * The buffer management is also modified as buffers are
    slightly different between Coldfire and i.MX

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: fb314f8a120aa49f8f6ad886f312c649b484fb5a.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:30 +01:00
Jean-Christophe Dubois
20d0f9cf6a i.MX: Add I2C controller emulator
The slave mode is not implemented.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 508dbf2ebe26ec383d3a12a1db5a7890ac8acf20.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:30 +01:00
Jean-Christophe Dubois
f044ac4980 i.MX: KZM: use standalone i.MX31 SOC support
Convert the KZM board to use the i.MX31 SoC defintition instead of
redefining the entire SoC on the machine level. Major rewrite of the
machine init code.

While touching the memory map comment de-indent to the correct level
of indentation.

This obsoletes the legacy i.MX device device creation helpers which are removed.

Tested by booting a minimal Linux system on the emulated platform

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 5e783561f092e1c939562fdff001f1ab1194b07f.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:30 +01:00
Jean-Christophe Dubois
558df83db7 i.MX: Add SOC support for i.MX31
For now we support the following devices:
  * CPU: ARM1136
  * Interrupt Controller: AVIC
  * CCM
  * UART x 2
  * EPIT x 2
  * GPT

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: f146d819594e41568daec42a1d0f440cdfe3df76.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:30 +01:00
Sergey Sorokin
771842585f target-arm: Fix arm_excp_unmasked() function
There is an error in arm_excp_unmasked() function:
bitwise operator & is used with integer and bool operands
causing an incorrect zeroed result.
The patch fixes it.

Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-id: 1441209238-16881-1-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:30 +01:00
Pavel Fedin
5125f9cd25 hw/arm/virt: Add high MMIO PCI region, 512G in size
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around the problem, "highmem" option is introduced. It
defaults to on on, but can be manually set to off in order to be able to run
those old 32-bit guests.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
[PMM: Added missing ULL suffixes and a comment to the a15memmap[] entry]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:29 +01:00
Sergey Sorokin
3a9148d0bd target-arm: Fix AArch32:AArch64 general-purpose register mapping
There is an error in functions aarch64_sync_32_to_64() and
aarch64_sync_64_to_32() with mapping of registers between AArch32 and
AArch64.  This commit fixes the mapping to match the v8 ARM ARM
section D1.20.1 (table D1-77).

Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-id: 1440796451-15276-1-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: tidied commit message a bit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:29 +01:00
Peter Crosthwaite
8f6fd322f6 arm: Remove hw_error() usages.
All of these hw_errors are fatal and indicate something wrong with
QEMU implementation.

Convert to g_assert_not_reached.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 169194d09017e5725535d31a1507d454c0043706.1440842587.git.crosthwaite.peter@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 10:39:29 +01:00