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i.MX: Add qtest support for I2C device emulator.

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This is using a ds1338 RTC chip on the I2C bus. This RTC chip is
not present on the real 3DS PDK board.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Acked-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 05601683a2a95c881cbc9f22651a044d969bd0ae.1441057361.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Jean-Christophe Dubois 2015-09-07 10:39:31 +01:00 committed by Peter Maydell
parent 65f57c4363
commit 7f3986278b
5 changed files with 294 additions and 0 deletions
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1
include/hw/arm/fsl-imx31.h
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@ -23,6 +23,7 @@
#include "hw/char/imx_serial.h"
#include "hw/timer/imx_gpt.h"
#include "hw/timer/imx_epit.h"
#include "hw/i2c/imx_i2c.h"
#include "exec/memory.h"
#define TYPE_FSL_IMX31 "fsl,imx31"

3
tests/Makefile
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@ -201,6 +201,7 @@ check-qtest-sparc64-y = tests/endianness-test$(EXESUF)
gcov-files-sparc-y += hw/timer/m48t59.c
gcov-files-sparc64-y += hw/timer/m48t59.c
check-qtest-arm-y = tests/tmp105-test$(EXESUF)
check-qtest-arm-y = tests/ds1338-test$(EXESUF)
gcov-files-arm-y += hw/misc/tmp105.c
check-qtest-arm-y += tests/virtio-blk-test$(EXESUF)
gcov-files-arm-y += arm-softmmu/hw/block/virtio-blk.c
@ -358,6 +359,7 @@ libqos-pc-obj-y = $(libqos-obj-y) tests/libqos/pci-pc.o
libqos-pc-obj-y += tests/libqos/malloc-pc.o tests/libqos/libqos-pc.o
libqos-pc-obj-y += tests/libqos/ahci.o
libqos-omap-obj-y = $(libqos-obj-y) tests/libqos/i2c-omap.o
libqos-imx-obj-y = $(libqos-obj-y) tests/libqos/i2c-imx.o
libqos-usb-obj-y = $(libqos-pc-obj-y) tests/libqos/usb.o
libqos-virtio-obj-y = $(libqos-pc-obj-y) tests/libqos/virtio.o tests/libqos/virtio-pci.o tests/libqos/virtio-mmio.o tests/libqos/malloc-generic.o
@ -372,6 +374,7 @@ tests/hd-geo-test$(EXESUF): tests/hd-geo-test.o
tests/boot-order-test$(EXESUF): tests/boot-order-test.o $(libqos-obj-y)
tests/bios-tables-test$(EXESUF): tests/bios-tables-test.o $(libqos-obj-y)
tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y)
tests/ds1338-test$(EXESUF): tests/ds1338-test.o $(libqos-imx-obj-y)
tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y)
tests/q35-test$(EXESUF): tests/q35-test.o $(libqos-pc-obj-y)
tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y)

78
tests/ds1338-test.c Normal file
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@ -0,0 +1,78 @@
/*
* QTest testcase for the DS1338 RTC
*
* Copyright (c) 2013 Jean-Christophe Dubois
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "libqtest.h"
#include "libqos/i2c.h"
#include <glib.h>
#define IMX25_I2C_0_BASE 0x43F80000
#define DS1338_ADDR 0x68
static I2CAdapter *i2c;
static uint8_t addr;
static inline uint8_t bcd2bin(uint8_t x)
{
return ((x) & 0x0f) + ((x) >> 4) * 10;
}
static void send_and_receive(void)
{
uint8_t cmd[1];
uint8_t resp[7];
time_t now = time(NULL);
struct tm *tm_ptr = gmtime(&now);
/* reset the index in the RTC memory */
cmd[0] = 0;
i2c_send(i2c, addr, cmd, 1);
/* retrieve the date */
i2c_recv(i2c, addr, resp, 7);
/* check retrieved time againt local time */
g_assert_cmpuint(bcd2bin(resp[4]), == , tm_ptr->tm_mday);
g_assert_cmpuint(bcd2bin(resp[5]), == , 1 + tm_ptr->tm_mon);
g_assert_cmpuint(2000 + bcd2bin(resp[6]), == , 1900 + tm_ptr->tm_year);
}
int main(int argc, char **argv)
{
QTestState *s = NULL;
int ret;
g_test_init(&argc, &argv, NULL);
s = qtest_start("-display none -machine imx25_pdk");
i2c = imx_i2c_create(IMX25_I2C_0_BASE);
addr = DS1338_ADDR;
qtest_add_func("/ds1338/tx-rx", send_and_receive);
ret = g_test_run();
if (s) {
qtest_quit(s);
}
g_free(i2c);
return ret;
}

209
tests/libqos/i2c-imx.c Normal file
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@ -0,0 +1,209 @@
/*
* QTest i.MX I2C driver
*
* Copyright (c) 2013 Jean-Christophe Dubois
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "libqos/i2c.h"
#include <glib.h>
#include <string.h>
#include "qemu/osdep.h"
#include "libqtest.h"
#include "hw/i2c/imx_i2c.h"
enum IMXI2CDirection {
IMX_I2C_READ,
IMX_I2C_WRITE,
};
typedef struct IMXI2C {
I2CAdapter parent;
uint64_t addr;
} IMXI2C;
static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr,
enum IMXI2CDirection direction)
{
writeb(s->addr + I2DR_ADDR, (addr << 1) |
(direction == IMX_I2C_READ ? 1 : 0));
}
static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr,
const uint8_t *buf, uint16_t len)
{
IMXI2C *s = (IMXI2C *)i2c;
uint8_t data;
uint8_t status;
uint16_t size = 0;
if (!len) {
return;
}
/* set the bus for write */
data = I2CR_IEN |
I2CR_IIEN |
I2CR_MSTA |
I2CR_MTX |
I2CR_TXAK;
writeb(s->addr + I2CR_ADDR, data);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* set the slave address */
imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
g_assert((status & I2SR_RXAK) == 0);
/* ack the interrupt */
writeb(s->addr + I2SR_ADDR, 0);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
while (size < len) {
/* check we are still busy */
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* write the data */
writeb(s->addr + I2DR_ADDR, buf[size]);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
g_assert((status & I2SR_RXAK) == 0);
/* ack the interrupt */
writeb(s->addr + I2SR_ADDR, 0);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
size++;
}
/* release the bus */
data &= ~(I2CR_MSTA | I2CR_MTX);
writeb(s->addr + I2CR_ADDR, data);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) == 0);
}
static void imx_i2c_recv(I2CAdapter *i2c, uint8_t addr,
uint8_t *buf, uint16_t len)
{
IMXI2C *s = (IMXI2C *)i2c;
uint8_t data;
uint8_t status;
uint16_t size = 0;
if (!len) {
return;
}
/* set the bus for write */
data = I2CR_IEN |
I2CR_IIEN |
I2CR_MSTA |
I2CR_MTX |
I2CR_TXAK;
writeb(s->addr + I2CR_ADDR, data);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* set the slave address */
imx_i2c_set_slave_addr(s, addr, IMX_I2C_READ);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
g_assert((status & I2SR_RXAK) == 0);
/* ack the interrupt */
writeb(s->addr + I2SR_ADDR, 0);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
/* set the bus for read */
data &= ~I2CR_MTX;
/* if only one byte don't ack */
if (len != 1) {
data &= ~I2CR_TXAK;
}
writeb(s->addr + I2CR_ADDR, data);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* dummy read */
readb(s->addr + I2DR_ADDR);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
/* ack the interrupt */
writeb(s->addr + I2SR_ADDR, 0);
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
while (size < len) {
/* check we are still busy */
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
if (size == (len - 1)) {
/* stop the read transaction */
data &= ~(I2CR_MSTA | I2CR_MTX);
} else {
/* ack the data read */
data |= I2CR_TXAK;
}
writeb(s->addr + I2CR_ADDR, data);
/* read the data */
buf[size] = readb(s->addr + I2DR_ADDR);
if (size != (len - 1)) {
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
/* ack the interrupt */
writeb(s->addr + I2SR_ADDR, 0);
}
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
size++;
}
status = readb(s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) == 0);
}
I2CAdapter *imx_i2c_create(uint64_t addr)
{
IMXI2C *s = g_malloc0(sizeof(*s));
I2CAdapter *i2c = (I2CAdapter *)s;
s->addr = addr;
i2c->send = imx_i2c_send;
i2c->recv = imx_i2c_recv;
return i2c;
}

3
tests/libqos/i2c.h
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@ -27,4 +27,7 @@ void i2c_recv(I2CAdapter *i2c, uint8_t addr,
/* libi2c-omap.c */
I2CAdapter *omap_i2c_create(uint64_t addr);
/* libi2c-imx.c */
I2CAdapter *imx_i2c_create(uint64_t addr);
#endif