Commit Graph

99522 Commits

Author SHA1 Message Date
Philippe Mathieu-Daudé
d03a008e82 disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats
Suggested-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-4-philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Philippe Mathieu-Daudé
50fc0945b6 disas/nanomips: Fix invalid PRIx64 format calling img_format()
Fix:

  disas/nanomips.c:12231:62: warning: format specifies type 'char *' but the argument has type 'uint64' (aka 'unsigned long long') [-Wformat]
    return img_format("RESTOREF 0x%" PRIx64 ", %s", u_value, count_value);
                                               ~~            ^~~~~~~~~~~
                                               %llu

Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions")
Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-3-philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Philippe Mathieu-Daudé
04849c94fe disas/nanomips: Fix invalid PRId64 format calling img_format()
Fix warnings such:

  disas/nanomips.c:3251:64: warning: format specifies type 'char *' but the argument has type 'int64' (aka 'long long') [-Wformat]
    return img_format("CACHE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs);
                                            ~~                 ^~~~~~~
                                            %lld

To avoid crashes such (kernel from commit f375ad6a0d):

  $ qemu-system-mipsel -cpu I7200 -d in_asm -kernel generic_nano32r6el_page4k
  ...
  ----------------
  IN: __bzero
  0x805c6084:  20c4 6950      ADDU r13, a0, a2
  0x805c6088:  9089           ADDIU a0, 1
  Process 70261 stopped
  * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0)
      frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4
  libsystem_platform.dylib`:
  ->  0x1bfe38864 <+4>:  ldr    q0, [x1]
      0x1bfe38868 <+8>:  adr    x3, #-0xc8                ; ___lldb_unnamed_symbol314
      0x1bfe3886c <+12>: ldr    q2, [x3], #0x10
      0x1bfe38870 <+16>: and    x2, x0, #0xf
  Target 0: (qemu-system-mipsel) stopped.
  (lldb) bt
  * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0)
    * frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4
      frame #1: 0x00000001bfce76a0 libsystem_c.dylib`__vfprintf + 4544
      frame #2: 0x00000001bfd158b4 libsystem_c.dylib`_vasprintf + 280
      frame #3: 0x0000000101c22fb0 libglib-2.0.0.dylib`g_vasprintf + 28
      frame #4: 0x0000000101bfb7d8 libglib-2.0.0.dylib`g_strdup_vprintf + 32
      frame #5: 0x000000010000fb70 qemu-system-mipsel`img_format(format=<unavailable>) at nanomips.c:103:14 [opt]
      frame #6: 0x0000000100018868 qemu-system-mipsel`SB_S9_(instruction=<unavailable>, info=<unavailable>) at nanomips.c:12616:12 [opt]
      frame #7: 0x000000010000f90c qemu-system-mipsel`print_insn_nanomips at nanomips.c:589:28 [opt]

Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions")
Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-2-philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Jiaxun Yang
2a2105a262 target/mips: Don't check COP1X for 64 bit FP mode
Some implementations (i.e. Loongson-2F) may decide to implement
a 64 bit FPU without implementing COP1X instructions.

As the eligibility of 64 bit FP instructions is already determined
by CP0St_FR, there is no need to check for COP1X again.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com>
[PMD: Add missing trailing parenthesis (buildfix)]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Jiaxun Yang
4bfc895383 target/mips: Disable DSP ASE for Octeon68XX
I don't have access to Octeon68XX hardware but according
to my investigation Octeon never had DSP ASE support.

As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" CP0C3_DSPP is reserved bit and read as 0. Also I do have
access to a Ubiquiti Edgerouter 4 which has Octeon CN7130 processor
and I can confirm CP0C3_DSPP is read as 0 on that processor.

Further more, in linux kernel:
arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
cpu_has_dsp is overridden as 0.

So I believe we shouldn't emulate DSP in QEMU as well.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <20221031132531.18122-4-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Pavel Dovgalyuk
4525ea7e0c target/mips: Enable LBX/LWX/* instructions for Octeon
This patch changes condition and function name for enabling
indexed load instructions for Octeon vCPUs. Octeons do not
have DSP extension, but implement LBX-and-others.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <166728058455.229236.13834649461181619195.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Jiaxun Yang
0e8b3010af target/mips: Cast offset field of Octeon BBIT to int16_t
As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" offset field is signed 16 bit value. However arg_BBIT.offset
is unsigned. We need to cast it as signed to do address calculation.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Jiaxun Yang
8063db0fc8 target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
As per an unpublished document, in later reversion of chips
CP0St_{KX, SX, UX} is not writeable and hardcoded to 1.

Without those bits set, kernel is unable to access XKPHYS address
segment. So just set them up on CPU reset.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221031132531.18122-2-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-11-08 01:04:25 +01:00
Stefan Hajnoczi
cd706454c6 * e1000e qtest improvements
* Allow TLS PSK tests on win32
 * Increase the timeout of the clang-user CI job
 * Some s390x fixes for QEMU 7.2
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Merge tag 'pull-request-2022-11-06' of https://gitlab.com/thuth/qemu into staging

* e1000e qtest improvements
* Allow TLS PSK tests on win32
* Increase the timeout of the clang-user CI job
* Some s390x fixes for QEMU 7.2

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# gpg: Signature made Sun 06 Nov 2022 10:29:55 EST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2022-11-06' of https://gitlab.com/thuth/qemu:
  s390x/cpu topology: add max_threads machine class attribute
  s390x: Register TYPE_S390_CCW_MACHINE properties as class properties
  s390x/pci: RPCIT second pass when mappings exhausted
  s390x/css: revert SCSW ctrl/flag bits on error
  gitlab-ci: increase clang-user timeout
  tests/qtest: migration-test: Enable TLS PSK tests for win32
  tests/qtest: Fix two format strings
  tests/qtest/libqos/e1000e: Use IVAR shift definitions
  tests/qtest/libqos/e1000e: Use E1000_STATUS_ASDV_1000
  tests/qtest/e1000e-test: Use e1000_regs.h
  tests/qtest/libqos/e1000e: Set E1000_CTRL_SLU
  tests/qtest/libqos/e1000e: Refer common PCI ID definitions

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-07 05:44:44 -05:00
Stefan Hajnoczi
20a885a87d * bug fixes for Win32 event loop
* bug fixes for -Wextra
 * fix gdb XML for 32-bit x86
 * improve error handling for module load
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* bug fixes for Win32 event loop
* bug fixes for -Wextra
* fix gdb XML for 32-bit x86
* improve error handling for module load

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# gpg: Signature made Sun 06 Nov 2022 03:48:55 EST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  accel: abort if we fail to load the accelerator plugin
  dmg: warn when opening dmg images containing blocks of unknown type
  module: add Error arguments to module_load and module_load_qom
  module: rename module_load_one to module_load
  module: removed unused function argument "mayfail"
  Add missing include statement for global xml_builtin
  meson: avoid unused arguments of main() in compiler tests
  Fix broken configure with -Wunused-parameter
  gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB
  util/aio-win32: Correct the event array size in aio_poll()
  util/main-loop: Avoid adding the same HANDLE twice
  util/main-loop: Fix maximum number of wait objects for win32

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-07 05:44:35 -05:00
Stefan Hajnoczi
64be791d3c Pull request trivial branch 20221103-v2
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Merge tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging

Pull request trivial branch 20221103-v2

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# gpg: Signature made Sat 05 Nov 2022 15:51:59 EDT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu:
  tests/unit: simpler variable sequence for test-io-channel
  target/tricore: Rename csfr.def -> csfr.h.inc
  target/s390x: Rename insn-data/format.def -> insn-data/format.h.inc
  target/m68k: Rename qregs.def -> qregs.h.inc
  xen/pt: fix syntax error that causes FTBFS in some configurations
  Fix some typos in documentation and comments
  qapi: virtio: Fix the introduced version

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-07 05:44:26 -05:00
Pierre Morel
6393b29966 s390x/cpu topology: add max_threads machine class attribute
The S390 CPU topology accepts the smp.threads argument while
in reality it does not effectively allow multthreading.

Let's keep this behavior for machines older than 7.2 and
refuse to use threads in newer machines until multithreading
is really exposed to the guest by the machine.

Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
Message-Id: <20221103170150.20789-3-pmorel@linux.ibm.com>
[thuth: Small fixes to the commit description]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 12:38:57 +01:00
Pierre Morel
1fd396e322 s390x: Register TYPE_S390_CCW_MACHINE properties as class properties
Currently, when running 'qemu-system-s390x -M s390-ccw-virtio,help'
the s390x-specific properties are not listed anymore. This happens
because since commit d8fb7d0969 ("vl: switch -M parsing to keyval")
the properties have to be defined at the class level and not at the
instance level anymore. Fix it on s390x now, too, by moving the
registration of the properties to the class level"

Fixes: d8fb7d0969 ("vl: switch -M parsing to keyval")
Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
Message-Id: <20221103170150.20789-2-pmorel@linux.ibm.com>
[thuth: Add patch description]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 12:38:57 +01:00
Matthew Rosato
4a8d21ba50 s390x/pci: RPCIT second pass when mappings exhausted
If we encounter a new mapping while the number of available DMA entries
in vfio is 0, we are currently skipping that mapping which is a problem
if we manage to free up DMA space after that within the same RPCIT --
we will return to the guest with CC0 and have not mapped everything
within the specified range.  This issue was uncovered while testing
changes to the s390 linux kernel iommu/dma code, where a different
usage pattern was employed (new mappings start at the end of the
aperture and work back towards the front, making us far more likely
to encounter new mappings before invalidated mappings during a
global refresh).

Fix this by tracking whether any mappings were skipped due to vfio
DMA limit hitting 0; when this occurs, we still continue the range
and unmap/map anything we can - then we must re-run the range again
to pickup anything that was missed.  This must occur in a loop until
all requests are satisfied (success) or we detect that we are still
unable to complete all mappings (return ZPCI_RPCIT_ST_INSUFF_RES).

Link: https://lore.kernel.org/linux-s390/20221019144435.369902-1-schnelle@linux.ibm.com/
Fixes: 37fa32de70 ("s390x/pci: Honor DMA limits set by vfio")
Reported-by: Niklas Schnelle <schnelle@linux.ibm.com>
Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com>
Message-Id: <20221028194758.204007-2-mjrosato@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 12:27:35 +01:00
Peter Jin
f53b033e4c s390x/css: revert SCSW ctrl/flag bits on error
Revert the control and flag bits in the subchannel status word in case
the SSCH operation fails with non-zero CC (ditto for CSCH and HSCH).
According to POPS, the control and flag bits are only changed if SSCH,
CSCH, and HSCH return CC 0, and no other action should be taken otherwise.
In order to simulate that after the fact, the bits need to be reverted on
non-zero CC.

While the do_subchannel_work logic for virtual (virtio) devices will
return condition code 0, passthrough (vfio) devices may encounter
errors from either the host kernel or real hardware that need to be
accounted for after this point. This includes restoring the state of
the Subchannel Status Word to reflect the subchannel, as these bits
would not be set in the event of a non-zero condition code from the
affected instructions.

Experimentation has shown that a failure on a START SUBCHANNEL (SSCH)
to a passthrough device would leave the subchannel with the START
PENDING activity control bit set, thus blocking subsequent SSCH
operations in css_do_ssch() until some form of error recovery was
undertaken since no interrupt would be expected.

Signed-off-by: Peter Jin <pjin@linux.ibm.com>
Message-Id: <20221027212341.2904795-1-pjin@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
[thuth: Updated the commit description to Eric's suggestion]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 12:27:35 +01:00
Stefan Hajnoczi
765de32d87 gitlab-ci: increase clang-user timeout
The clang-user test exceeds the 1 hour timeout occassionally.

Philippe Mathieu-Daudé has pointed out that the number of tcg tests has
increased since QEMU 7.1. The execution time therefore probably reflects
a legitimate increase in tests rather than a performance regression.

Bump the timeout to prevent CI failures.

Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20221104113659.427690-1-stefanha@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 12:02:45 +01:00
Bin Meng
d1695f1839 tests/qtest: migration-test: Enable TLS PSK tests for win32
Since commit f1018ea0a3 ("tests: avoid DOS line endings in PSK file"),
the bug of the helper test_tls_psk_init_common() that caused TLS PSK
tests to fail on Windows was fixed. Let's enable these tests on win32.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20221101035021.729669-1-bin.meng@windriver.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 10:44:19 +01:00
Stefan Weil
d46e6bba55 tests/qtest: Fix two format strings
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20221105115525.623059-1-sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 10:41:47 +01:00
Akihiko Odaki
624ee20cb9 tests/qtest/libqos/e1000e: Use IVAR shift definitions
There were still some constants defined in e1000_regs.h.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221105053010.38037-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 10:14:26 +01:00
Akihiko Odaki
5ebafa1643 tests/qtest/libqos/e1000e: Use E1000_STATUS_ASDV_1000
Nemonics E1000_STATUS_LAN_INIT_DONE and E1000_STATUS_ASDV_1000 have
the same value, and E1000_STATUS_ASDV_1000 should be used here because
E1000_STATUS_ASDV_1000 represents the auto-detected speed tested here
while E1000_STATUS_LAN_INIT_DONE is a value used for a different purpose
with a variant of e1000e family different from the one implemented in
QEMU.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103083425.100590-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 10:14:26 +01:00
Akihiko Odaki
dfa644b231 tests/qtest/e1000e-test: Use e1000_regs.h
The register definitions in tests/qtest/e1000e-test.c had names
different from hw/net/e1000_regs.h, which made it hard to understand
what test codes corresponds to the implementation. Use
hw/net/e1000_regs.h from tests/qtest/libqos/e1000e.c to remove
these duplications.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103095416.110162-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 10:14:26 +01:00
Akihiko Odaki
ff4f45811f tests/qtest/libqos/e1000e: Set E1000_CTRL_SLU
The later device status check depends on E1000_STATUS_LU, which is
enabled by E1000_CTRL_SLU. Though E1000_STATUS_LU is not implemented
and E1000_STATUS_LU is always available in the current implementation,
be a bit nicer and set E1000_CTRL_SLU just in case the bit is
implemented in the future.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103025451.27446-1-akihiko.odaki@daynix.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 10:14:26 +01:00
Akihiko Odaki
897c0da96f tests/qtest/libqos/e1000e: Refer common PCI ID definitions
This is yet another minor cleanup to ease understanding and
future refactoring of the tests.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103015017.19947-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06 10:14:26 +01:00
Claudio Fontana
5141e9a23f accel: abort if we fail to load the accelerator plugin
if QEMU is configured with modules enabled, it is possible that the
load of an accelerator module will fail.
Exit in this case, relying on module_object_class_by_name to report
the specific load error if any.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

[claudio: changed abort() to exit(1)]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220929093035.4231-6-cfontana@suse.de>

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:50 +01:00
Kevin Wolf
971974f0a9 dmg: warn when opening dmg images containing blocks of unknown type
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929093035.4231-5-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:50 +01:00
Claudio Fontana
c551fb0b53 module: add Error arguments to module_load and module_load_qom
improve error handling during module load, by changing:

bool module_load(const char *prefix, const char *lib_name);
void module_load_qom(const char *type);

to:

int module_load(const char *prefix, const char *name, Error **errp);
int module_load_qom(const char *type, Error **errp);

where the return value is:

 -1 on module load error, and errp is set with the error
  0 on module or one of its dependencies are not installed
  1 on module load success
  2 on module load success (module already loaded or built-in)

module_load_qom_one has been introduced in:

commit 28457744c3 ("module: qom module support"), which built on top of
module_load_one, but discarded the bool return value. Restore it.

Adapt all callers to emit errors, or ignore them, or fail hard,
as appropriate in each context.

Replace the previous emission of errors via fprintf in _some_ error
conditions with Error and error_report, so as to emit to the appropriate
target.

A memory leak is also fixed as part of the module_load changes.

audio: when attempting to load an audio module, report module load errors.
Note that still for some callers, a single issue may generate multiple
error reports, and this could be improved further.
Regarding the audio code itself, audio_add() seems to ignore errors,
and this should probably be improved.

block: when attempting to load a block module, report module load errors.
For the code paths that already use the Error API, take advantage of those
to report module load errors into the Error parameter.
For the other code paths, we currently emit the error, but this could be
improved further by adding Error parameters to all possible code paths.

console: when attempting to load a display module, report module load errors.

qdev: when creating a new qdev Device object (DeviceState), report load errors.
      If a module cannot be loaded to create that device, now abort execution
      (if no CONFIG_MODULE) or exit (if CONFIG_MODULE).

qom/object.c: when initializing a QOM object, or looking up class_by_name,
              report module load errors.

qtest: when processing the "module_load" qtest command, report errors
       in the load of the module.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929093035.4231-4-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:50 +01:00
Claudio Fontana
dbc0e80553 module: rename module_load_one to module_load
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929093035.4231-3-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:50 +01:00
Claudio Fontana
2106106d80 module: removed unused function argument "mayfail"
mayfail is always passed as false for every invocation throughout the program.
It controls whether to printf or not to printf an error on
g_module_open failure.

Remove this unused argument.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929093035.4231-2-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:50 +01:00
Stefan Weil
efa3901e14 Add missing include statement for global xml_builtin
This fixes some compiler warnings with compiler flag
-Wmissing-variable-declarations (tested with clang):

    aarch64_be-linux-user-gdbstub-xml.c:564:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations]
    aarch64-linux-user-gdbstub-xml.c:564:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations]
    aarch64-softmmu-gdbstub-xml.c:1763:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations]

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:42 +01:00
Paolo Bonzini
b5d3dac170 meson: avoid unused arguments of main() in compiler tests
meson.build has one test where "main" is declared unnecessarily
with argc and argv arguments, but does not use them.  Because
the test needs -Werror too, HAVE_BROKEN_SIZE_MAX is defined
incorrectly.

Fix the test and, for consistency, remove argc and argv whenever
they are not needed.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:42 +01:00
Stefan Weil
8a0afbb2a4 Fix broken configure with -Wunused-parameter
The configure script fails because it tries to compile small C programs
with a main function which is declared with arguments argc and argv
although those arguments are unused.

Running `configure -extra-cflags=-Wunused-parameter` triggers the problem.
configure for a native build does abort but shows the error in config.log.
A cross build configure for Windows with Debian stable aborts with an
error.

Avoiding unused arguments fixes this.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20221102202258.456359-1-sw@weilnetz.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:37 +01:00
TaiseiIto
75ac231c67 gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB
Before this commit, there were contradictory descriptions about size of EFER
register.
Line 113 says the size is 8 bytes.
Line 129 says the size is 4 bytes.

As a result, when GDB is debugging an OS running on QEMU, the GDB cannot
read 'g' packets correctly. This 'g' packet transmits values of each
registers of machine emulated by QEMU to GDB. QEMU, the packet sender,
assign 4 bytes for EFER in 'g' packet based on the line 113.
GDB, the packet receiver, extract 8 bytes for EFER in 'g' packet based on
the line 129. Therefore, all registers located behind EFER in 'g' packet
has been shifted 4 bytes in GDB.

After this commit, GDB can read 'g' packets correctly.

Signed-off-by: TaiseiIto <taisei1212@outlook.jp>
Message-Id: <TY0PR0101MB4285F637209075C9F65FCDA6A4479@TY0PR0101MB4285.apcprd01.prod.exchangelabs.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:26 +01:00
Bin Meng
e0d034bb24 util/aio-win32: Correct the event array size in aio_poll()
WaitForMultipleObjects() can only wait for MAXIMUM_WAIT_OBJECTS
object handles. Correct the event array size in aio_poll() and
add a assert() to ensure it does not cause out of bound access.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20221019102015.2441622-3-bmeng.cn@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:26 +01:00
Bin Meng
d393b0a176 util/main-loop: Avoid adding the same HANDLE twice
Fix the logic in qemu_add_wait_object() to avoid adding the same
HANDLE twice, as the behavior is undefined when passing an array
that contains same HANDLEs to WaitForMultipleObjects() API.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20221019102015.2441622-2-bmeng.cn@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:26 +01:00
Bin Meng
4f76b3d9bb util/main-loop: Fix maximum number of wait objects for win32
The maximum number of wait objects for win32 should be
MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20221019102015.2441622-1-bmeng.cn@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:26 +01:00
Alex Bennée
5a820d5d07 tests/unit: simpler variable sequence for test-io-channel
This avoids some compilers complaining about a potentially
un-initialised [src|dst]argv. In retrospect using GString was overkill
for what we are constructing.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20221103102329.2581508-1-alex.bennee@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05 20:35:45 +01:00
Philippe Mathieu-Daudé
5d756c82c9 target/tricore: Rename csfr.def -> csfr.h.inc
We use the .h.inc extension to include C headers. To be consistent
with the rest of the codebase, rename the C headers using the .def
extension.

IDE/tools using our .editorconfig / .gitattributes will leverage
this consistency.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221025235006.7215-4-philmd@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05 20:35:45 +01:00
Philippe Mathieu-Daudé
9cef8d9926 target/s390x: Rename insn-data/format.def -> insn-data/format.h.inc
We use the .h.inc extension to include C headers. To be consistent
with the rest of the codebase, rename the C headers using the .def
extension.

IDE/tools using our .editorconfig / .gitattributes will leverage
this consistency.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221025235006.7215-3-philmd@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05 20:35:45 +01:00
Philippe Mathieu-Daudé
0f208a9747 target/m68k: Rename qregs.def -> qregs.h.inc
We use the .h.inc extension to include C headers. To be consistent
with the rest of the codebase, rename the C headers using the .def
extension.

IDE/tools using our .editorconfig / .gitattributes will leverage
this consistency.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221025235006.7215-2-philmd@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05 20:35:45 +01:00
Chuck Zmudzinski
ba24456b93 xen/pt: fix syntax error that causes FTBFS in some configurations
When Qemu is built with --enable-xen and --disable-xen-pci-passthrough
and the target os is linux, the build fails with:

meson.build:3477:2: ERROR: File xen_pt_stub.c does not exist.

Fixes: 582ea95f5f ("meson: convert hw/xen")

Signed-off-by: Chuck Zmudzinski <brchuckz@aol.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <5f1342a13c09af77b1a7b0aeaba5955bcea89731.1667242033.git.brchuckz@aol.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05 20:35:45 +01:00
Stefan Weil
1e458f1127 Fix some typos in documentation and comments
Most of them were found and fixed using codespell.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20221030105944.311940-1-sw@weilnetz.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05 20:35:45 +01:00
Han Han
58379af710 qapi: virtio: Fix the introduced version
The items of qapi/virtio.json are introduced at a5ebce3857. They will be
in the version 7.2 not 7.1.

Signed-off-by: Han Han <hhan@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20221101014647.3000801-1-hhan@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05 20:35:45 +01:00
Stefan Hajnoczi
466e81ff12 VFIO fixes for v7.2-rc0
* Correct initial migration device state using correct v1
    protocol enum (Avihai Horon)
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Merge tag 'vfio-fixes-v7.2-rc0.0' of https://gitlab.com/alex.williamson/qemu into staging

VFIO fixes for v7.2-rc0

 * Correct initial migration device state using correct v1
   protocol enum (Avihai Horon)

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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 03 Nov 2022 18:01:02 EDT
# gpg:                using RSA key 42F6C04E540BD1A99E7B8A90239B9B6E3BB08B22
# gpg:                issuer "alex.williamson@redhat.com"
# gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" [full]
# gpg:                 aka "Alex Williamson <alex@shazbot.org>" [full]
# gpg:                 aka "Alex Williamson <alwillia@redhat.com>" [full]
# gpg:                 aka "Alex Williamson <alex.l.williamson@gmail.com>" [full]
# Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B  8A90 239B 9B6E 3BB0 8B22

* tag 'vfio-fixes-v7.2-rc0.0' of https://gitlab.com/alex.williamson/qemu:
  vfio/migration: Fix wrong enum usage

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-05 08:41:01 -04:00
Stefan Hajnoczi
6295a58ad1 target-arm queue:
* Fix regression booting Trusted Firmware
  * Honor HCR_E2H and HCR_TGE in ats_write64()
  * Copy the entire vector in DO_ZIP
  * Fix Privileged Access Never (PAN) for aarch32
  * Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB
  * Set SCR_EL3.HXEn when direct booting kernel
  * Set SME and SVE EL3 vector lengths when direct booting kernel
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Merge tag 'pull-target-arm-20221104' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * Fix regression booting Trusted Firmware
 * Honor HCR_E2H and HCR_TGE in ats_write64()
 * Copy the entire vector in DO_ZIP
 * Fix Privileged Access Never (PAN) for aarch32
 * Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB
 * Set SCR_EL3.HXEn when direct booting kernel
 * Set SME and SVE EL3 vector lengths when direct booting kernel

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# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 04 Nov 2022 07:34:01 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20221104' of https://git.linaro.org/people/pmaydell/qemu-arm:
  target/arm: Two fixes for secure ptw
  target/arm: Honor HCR_E2H and HCR_TGE in ats_write64()
  target/arm: Copy the entire vector in DO_ZIP
  target/arm: Fix Privileged Access Never (PAN) for aarch32
  target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB
  hw/arm/boot: Set SCR_EL3.HXEn when booting kernel
  hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-04 11:01:17 -04:00
Stefan Hajnoczi
7a033008cc pull-loongarch-20221104
v2:
  - fix win32 build error;
  - Add Rui Wang' patches.
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Merge tag 'pull-loongarch-20221104' of https://gitlab.com/gaosong/qemu into staging

pull-loongarch-20221104

v2:
 - fix win32 build error;
 - Add Rui Wang' patches.

# -----BEGIN PGP SIGNATURE-----
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# 92vLqEIDC6SbAlY4/CRJVJmOl58d4uhEUUpq6eVzmJHcA3W5qw==
# =wblG
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 04 Nov 2022 05:21:52 EDT
# gpg:                using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C  6C2C 40A2 FFF2 3926 3EDF

* tag 'pull-loongarch-20221104' of https://gitlab.com/gaosong/qemu:
  target/loongarch: Fix emulation of float-point disable exception
  target/loongarch: Adjust the layout of hardware flags bit fields
  target/loongarch: Fix raise_mmu_exception() set wrong exception_index
  target/loongarch: Add exception subcode
  hw/loongarch: Add TPM device for LoongArch virt machine
  hw/loongarch: Improve fdt for LoongArch virt machine
  hw/loongarch: Load FDT table into dram memory space
  hw/intc: Fix LoongArch extioi coreisr accessing
  hw/intc: Convert the memops to with_attrs in LoongArch extioi

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-04 11:01:00 -04:00
Richard Henderson
cead7fa4c0 target/arm: Two fixes for secure ptw
Reversed the sense of non-secure in get_phys_addr_lpae,
and failed to initialize attrs.secure for ARMMMUIdx_Phys_S.

Fixes: 48da29e4 ("target/arm: Add ptw_idx to S1Translate")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1293
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04 10:58:58 +00:00
Ake Koomsin
638d5dbd78 target/arm: Honor HCR_E2H and HCR_TGE in ats_write64()
We need to check HCR_E2H and HCR_TGE to select the right MMU index for
the correct translation regime.

To check for EL2&0 translation regime:
- For S1E0*, S1E1* and S12E* ops, check both HCR_E2H and HCR_TGE
- For S1E2* ops, check only HCR_E2H

Signed-off-by: Ake Koomsin <ake@igel.co.jp>
Message-id: 20221101064250.12444-1-ake@igel.co.jp
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04 10:58:58 +00:00
Richard Henderson
302ad91209 target/arm: Copy the entire vector in DO_ZIP
With odd_ofs set, we weren't copying enough data.

Fixes: 09eb6d7025 ("target/arm: Move sve zip high_ofs into simd_data")
Reported-by: Idan Horowitz <idan.horowitz@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221031054144.3574-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04 10:58:58 +00:00
Timofey Kutergin
6f2d9d7441 target/arm: Fix Privileged Access Never (PAN) for aarch32
When we implemented the PAN support we theoretically wanted
to support it for both AArch32 and AArch64, but in practice
several bugs made it essentially unusable with an AArch32
guest. Fix all those problems:

    - Use CPSR.PAN to check for PAN state in aarch32 mode
    - throw permission fault during address translation when PAN is
      enabled and kernel tries to access user acessible page
    - ignore SCTLR_XP bit for armv7 and armv8 (conflicts with SCTLR_SPAN).

Signed-off-by: Timofey Kutergin <tkutergin@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221027112619.2205229-1-tkutergin@gmail.com
[PMM: tweak commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04 10:58:58 +00:00
Peter Maydell
4870f38b0b target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB
The HCR_EL2.TTLB bit is supposed to trap all EL1 execution of TLB
maintenance instructions.  However we have added new TLB insns for
FEAT_TLBIOS and FEAT_TLBIRANGE, and forgot to set their accessfn to
access_ttlb.  Add the missing accessfns.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-11-04 10:58:58 +00:00