Commit Graph

26021 Commits

Author SHA1 Message Date
Hans de Goede
c3d6b96ebb virtio-console: Remove any pending watches on close
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-04-16 11:52:09 +02:00
Hans de Goede
f9fb0532fb virtio-console: Also throttle when less was written then requested
This is necessary so that we get properly woken up to write the rest.

This patch also changes the len argument to the have_data callback, to
avoid doing an unsigned signed comparison.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-04-16 11:52:09 +02:00
Alon Levy
8bb9f51ca2 spice: (32 bit only) fix surface cmd tracking destruction
No change for 64 bit arches, but for 32 bit previously we zeroed half
the surfaces cmd array, instead of all of it.

Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-04-16 11:52:09 +02:00
Gerd Hoffmann
5c74fb27f9 qxl: add 2000x2000 and 2048x2048 video modes
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-04-16 11:52:00 +02:00
Gerd Hoffmann
d4bcb199fb qxl: add 4k + 8k resolutions
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-04-16 09:03:51 +02:00
KONRAD Frederic
24a6e7f4d9 virtio-balloon: fix dynamic properties.
To keep compatibility with the old virtio-balloon-x, add the dynamic properties
to virtio-balloon-pci and virtio-balloon-ccw.

Cc: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
Message-id: 1365941220-8114-1-git-send-email-fred.konrad@greensocs.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15 17:06:58 -05:00
Anthony Liguori
4ceb193d30 Merge remote-tracking branch 'bonzini/hw-dirs' into staging
* bonzini/hw-dirs:
  exec: remove useless declarations from memory-internal.h
  memory: move core typedefs to qemu/typedefs.h
  include: avoid useless includes of exec/ headers
  sysemu: avoid proliferation of include/ subdirectories
  tpm: reorganize headers and split hardware part
  configure: fix TPM logic
  acpi.h: make it self contained
  acpi: move declarations from pc.h to acpi.h
  hw: Add lost ARM core again
  Fix failure to create q35 machine
  Add linux-headers to QEMU_INCLUDES
  arm: fix location of some include files

Conflicts:
	configure

aliguori: trivial conflict in configure output

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15 17:06:04 -05:00
Edgar E. Iglesias
a907cf59d8 Allow qtest to be used together with a virtual CPU
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 1366054097-14132-1-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15 17:05:34 -05:00
Andreas Färber
fe6c211781 qdev: Fix QOM unrealize behavior
Since commit 249d41720b (qdev: Prepare
"realized" property) setting realized = true would register the device's
VMStateDescription, but realized = false would not unregister it. Fix that.

Moving the code from unparenting also revealed that we were calling
DeviceClass::init through DeviceClass::realize as interim solution but
DeviceClass::exit still at unparenting time with a realized check.
Make this symmetrical by implementing DeviceClass::unrealize to call it,
while we're setting realized = false in the unparenting path.
The only other unrealize user is mac_nvram, which can safely override it.

Thus, mark DeviceClass::exit as obsolete, new devices should implement
DeviceClass::unrealize instead.

Cc: qemu-stable@nongnu.org
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Message-id: 1366043650-9719-1-git-send-email-afaerber@suse.de
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15 17:05:34 -05:00
Aurelien Jarno
e0e367bad7 Merge branch 'tcg-ppc64' of git://github.com/rth7680/qemu
* 'tcg-ppc64' of git://github.com/rth7680/qemu: (33 commits)
  tcg-ppc64: Handle deposit of zero
  tcg-ppc64: Implement mulu2/muls2_i64
  tcg-ppc64: Implement add2/sub2_i64
  tcg-ppc64: Use getauxval for ISA detection
  tcg-ppc64: Implement movcond
  tcg-ppc64: Use ISEL for setcond
  tcg-ppc64: Use MFOCRF instead of MFCR
  tcg-ppc64: Cleanup i32 constants to tcg_out_cmp
  tcg-ppc64: Use TCGType throughout compares
  tcg-ppc64: Use I constraint for mul
  tcg-ppc64: Implement deposit
  tcg-ppc64: Handle constant inputs for some compound logicals
  tcg-ppc64: Implement compound logicals
  tcg-ppc64: Implement bswap64
  tcg-ppc64: Implement bswap16 and bswap32
  tcg-ppc64: Implement rotates
  tcg-ppc64: Streamline qemu_ld/st insn selection
  tcg-ppc64: Use automatic implementation of ext32u_i64
  tcg-ppc64: Improve and_i64 with constant
  tcg-ppc64: Improve and_i32 with constant
  ...
2013-04-15 22:51:32 +02:00
Daniel P. Berrange
e6b636779b Add -f FMT / --format FMT arg to qemu-nbd
Currently the qemu-nbd program will auto-detect the format of
any disk it is given. This behaviour is known to be insecure.
For example, if qemu-nbd initially exposes a 'raw' file to an
unprivileged app, and that app runs

   'qemu-img create -f qcow2 -o backing_file=/etc/shadow /dev/nbd0'

then the next time the app is started, the qemu-nbd will now
detect it as a 'qcow2' file and expose /etc/shadow to the
unprivileged app.

The only way to avoid this is to explicitly tell qemu-nbd what
disk format to use on the command line, completely disabling
auto-detection. This patch adds a '-f' / '--format' arg for
this purpose, mirroring what is already available via qemu-img
and qemu commands.

  qemu-nbd --format raw -p 9000 evil.img

will now always use raw, regardless of what format 'evil.img'
looks like it contains

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
[Use errx, not err. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15 14:29:20 -05:00
Richard Henderson
39dc85b985 tcg-ppc64: Handle deposit of zero
The TCG optimizer does great work when inserting constants, being able
to fold the open-coded deposit expansion to just an AND or an OR.  Avoid
a bit the regression caused by having the deposit opcode by expanding
deposit of zero as an AND.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:55 +02:00
Richard Henderson
6645c147db tcg-ppc64: Implement mulu2/muls2_i64
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:54 +02:00
Richard Henderson
6c858762de tcg-ppc64: Implement add2/sub2_i64
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:54 +02:00
Richard Henderson
1e6e9aca15 tcg-ppc64: Use getauxval for ISA detection
Glibc 2.16 includes an easy way to get feature bits previously
buried in /proc or the program startup auxiliary vector.  Use it.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:54 +02:00
Richard Henderson
027ffea972 tcg-ppc64: Implement movcond
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:54 +02:00
Richard Henderson
70fac59a2a tcg-ppc64: Use ISEL for setcond
There are a few simple special cases that should be handled first.
Break these out to subroutines to avoid code duplication.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:53 +02:00
Richard Henderson
6995a4a063 tcg-ppc64: Use MFOCRF instead of MFCR
It takes half the cycles to read one CR register instead of all 8.
This is a backward compatible addition to the ISA, so chips prior
to Power 2.00 spec will simply continue to read the entire CR register.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:53 +02:00
Richard Henderson
991041a4eb tcg-ppc64: Cleanup i32 constants to tcg_out_cmp
Nothing else in the call chain ensures that these
constants don't have garbage in the high bits.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:53 +02:00
Richard Henderson
4c314da6d1 tcg-ppc64: Use TCGType throughout compares
The optimization/bug being fixed is that tcg_out_cmp was not applying the
right type to loading a constant, in the case it can't be implemented
directly.  Rather than recomputing the TCGType enum from the arch64 bool,
pass around the original TCGType throughout.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:52 +02:00
Richard Henderson
ef809300fc tcg-ppc64: Use I constraint for mul
The mul_i32 pattern was loading non-16-bit constants into a register,
when we can get the middle-end to do that for us.  The mul_i64 pattern
was not considering that MULLI takes 64-bit inputs.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:52 +02:00
Richard Henderson
33de9ed223 tcg-ppc64: Implement deposit
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:52 +02:00
Richard Henderson
37251b98db tcg-ppc64: Handle constant inputs for some compound logicals
Since we have special code to handle and/or/xor with a constant,
apply the same to andc/orc/eqv with a constant.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:51 +02:00
Richard Henderson
ce1010d6e3 tcg-ppc64: Implement compound logicals
Mostly copied from the ppc32 port.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:51 +02:00
Richard Henderson
68aebd45b1 tcg-ppc64: Implement bswap64
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:51 +02:00
Richard Henderson
5d22158200 tcg-ppc64: Implement bswap16 and bswap32
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 20:09:44 +02:00
Richard Henderson
313d91c778 tcg-ppc64: Implement rotates
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:38 +02:00
Richard Henderson
49d9870a54 tcg-ppc64: Streamline qemu_ld/st insn selection
Using a table to look up insns of the right width and sign.
Include support for the Power 2.06 LDBRX and STDBRX insns.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:35 +02:00
Richard Henderson
28f2dba6dc tcg-ppc64: Use automatic implementation of ext32u_i64
The enhancements to and immediate obviate this.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:31 +02:00
Richard Henderson
637af30c76 tcg-ppc64: Improve and_i64 with constant
Use RLDICL and RLDICR.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:27 +02:00
Richard Henderson
a9249dff4d tcg-ppc64: Improve and_i32 with constant
Use RLWINM

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:27 +02:00
Richard Henderson
dce74c57bb tcg-ppc64: Tidy or and xor patterns.
Handle constants in common code; we'll want to reuse that later.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:26 +02:00
Richard Henderson
148bdd2373 tcg-ppc64: Allow constant first argument to sub
Using SUBFIC for 16-bit signed constants.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:22 +02:00
Richard Henderson
ee924fa6b3 tcg-ppc64: Improve constant add and sub ops.
Improve constant addition -- previously we'd emit useless addi with 0.
Use new constraints to force the driver to pull full 64-bit constants
into a register.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:55:15 +02:00
Richard Henderson
3d582c6179 tcg-ppc64: Rearrange integer constant constraints
We'll need a zero, and Z makes more sense for that.  Make sure we
have a full compliment of signed and unsigned 16 and 32-bit tests.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:52:05 +02:00
Richard Henderson
421233a146 tcg-ppc64: Cleanup tcg_out_movi
The test for using movi32 was sub-optimal for TCG_TYPE_I32, comparing
a signed 32-bit quantity against an unsigned 32-bit quantity.

When possible, use addi+oris for 32-bit unsigned constants.  Otherwise,
standardize on addi+oris+ori instead of addis+ori+rldicl.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:52:04 +02:00
Richard Henderson
752c1fdb6d tcg-ppc64: Fix setcond_i32
We weren't ignoring the high 32 bits during a NE comparison.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:51:50 +02:00
Richard Henderson
2fd8eddcab tcg-ppc64: Introduce and use TAI and SAI
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:48 +02:00
Richard Henderson
5e916c287e tcg-ppc64: Introduce and use tcg_out_shri64
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:46 +02:00
Richard Henderson
0a9564b964 tcg-ppc64: Introduce and use tcg_out_shli64
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:44 +02:00
Richard Henderson
6e5e06024f tcg-ppc64: Introduce and use tcg_out_ext32u
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:41 +02:00
Richard Henderson
9e555b735c tcg-ppc64: Introduce and use tcg_out_rlw
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:39 +02:00
Richard Henderson
aceac8d685 tcg-ppc64: Use TCGReg everywhere
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:37 +02:00
Richard Henderson
66d4f6a32b disas: Disassemble all ppc insns for the host
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:35 +02:00
Paolo Bonzini
c72dd2d04b exec: remove useless declarations from memory-internal.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 18:19:26 +02:00
Paolo Bonzini
b421d9c6ab memory: move core typedefs to qemu/typedefs.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 18:19:26 +02:00
Paolo Bonzini
0bc3cd624f include: avoid useless includes of exec/ headers
Headers in include/exec/ are for the deepest innards of QEMU,
they should almost never be included directly.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 18:19:26 +02:00
Paolo Bonzini
dccfcd0e5f sysemu: avoid proliferation of include/ subdirectories
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 18:19:25 +02:00
Paolo Bonzini
bdee56f546 tpm: reorganize headers and split hardware part
The TPM subsystem does not have a full front-end/back-end separation.
The sole available backend, tpm_passthrough, depends on the data
structures of the sole available frontend, tpm_tis.

However, we can at least try to split the user interface (tpm.c) from the
implementation (hw/tpm).  The patches makes tpm.c not include tpm_int.h,
which is shared between tpm_tis.c and tpm_passthrough.c; instead it
moves more stuff to tpm_backend.h.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 18:19:25 +02:00
Paolo Bonzini
0ca5aa4f4c qemu-char: another io_add_watch_poll fix
After attaching the source, we have to remove the reference we hold
to it, because we do not hold anymore a pointer to the source.

If we do not do this, removing the source will not finalize it and
will not drop the "real" I/O watch source.

This showed up when backporting the new flow control patches to older
versions of QEMU that still used select.  The whole select then failed
with EBADF (poll instead will reporting POLLNVAL on a single pollfd)
and QEMU froze.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1365600207-21685-1-git-send-email-pbonzini@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15 10:22:05 -05:00