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158 Commits

Author SHA1 Message Date
pbrook
c276471991 The _exit syscall is used for both thread termination in NPTL applications, 
and process termination in legacy applications.  Try to guess which we want
based on the presence of multiple threads.

Also implement locking when modifying the CPU list.


Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-07 15:24:59 +00:00
blueswir1
4017190e2d Add SuperSPARC MMU breakpoint registers (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6125 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-23 15:30:50 +00:00
blueswir1
963262debc Better SuperSPARC emulation (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6123 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-23 15:06:35 +00:00
blueswir1
8fa211e881 Implement tick interrupt disable bits 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6122 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-23 08:47:26 +00:00
aliguori
6b9175478e Refactor translation block CPU state handling (Jan Kiszka) 
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 19:46:41 +00:00
aliguori
622ed3605b Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) 
as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 19:36:03 +00:00
blueswir1
e18231a3ff Show size for unassigned accesses (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-06 18:46:28 +00:00
blueswir1
f4b1a842d7 Rearrange tick functions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-03 19:04:42 +00:00
blueswir1
48585ec51d Fix missing prototype warnings by moving declarations 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5407 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-03 19:02:42 +00:00
blueswir1
9d92659858 Add software and timer interrupt support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-22 19:50:28 +00:00
blueswir1
f0d5e47183 Move signal handler prototype back to cpu.h 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-20 09:05:49 +00:00
blueswir1
d84763bc17 Convert rest of ops using float32 to TCG, remove FT0 and FT1 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 20:09:22 +00:00
blueswir1
3a3b925d47 Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-09 19:02:49 +00:00
blueswir1
47ad35f16a Silence gcc warning about constant overflow 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-06 17:50:16 +00:00
blueswir1
ba6a9d8cda Fix FCC handling for Sparc64 target, initial patch by Vince Weaver 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-29 21:03:31 +00:00
blueswir1
91736d378b Fix Sparc64 boot on i386 host: 
- move do_interrupt() back to op_helper.c
 - move non-helper prototypes from helper.h to exec.h
 - move some prototypes from cpu.h to exec.h
 - do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
   but instead provide inline functions


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-29 20:50:21 +00:00
blueswir1
5578ceab94 Use initial CPU definition structure for some CPU fields instead of copying 
them around, based on patch by Luis Pureza.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-21 17:33:42 +00:00
blueswir1
c19148bd8f Make MAXTL dynamic, bounds check tl when indexing 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-25 07:42:14 +00:00
blueswir1
0b8f1b102b Sparc32: save/load all MMU registers, Sparc64: add CPU save/load 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4938 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-24 11:28:51 +00:00
blueswir1
74b9decc47 Use MMU globals for some MMU traps 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4918 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-21 18:43:32 +00:00
blueswir1
fb79ceb91a Make UA200x features selectable, add MMU types 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-20 18:22:16 +00:00
blueswir1
e19e4efeaa Fix MMU miss traps 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4880 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-16 16:55:52 +00:00
pbrook
9656f324d2 Move interrupt_request and user_mode_only to common cpu state. 
Save and restore env->interrupt_request and env->halted.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-01 20:01:19 +00:00
pbrook
b3c7724cbc Move CPU save/load registration to common code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 16:31:04 +00:00
pbrook
2e70f6efa8 Add instruction counter. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 01:03:05 +00:00
blueswir1
0bbd4a0ddb Fix compiler warning (Jan Kiszka) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4781 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-23 16:58:04 +00:00
blueswir1
1a14026e11 Allow NWINDOWS selection (CPU feature with model specific defaults) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-07 08:07:37 +00:00
pbrook
f8ed7070ea Fix typo. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:54:15 +00:00
pbrook
6e68e076e7 Move clone() register setup to target specific code. Handle fork-like clone. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:22:15 +00:00
blueswir1
e30b467893 MicroSparc I didn't have fsmuld op 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 18:20:36 +00:00
bellard
9133e39b84 Push common interrupt variables to cpu-defs.h (Glauber Costa) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 10:08:06 +00:00
bellard
ce5232c5c2 moved halted field to CPU_COMMON 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-28 17:14:10 +00:00
blueswir1
77f193daa8 Wrap long lines 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 16:13:33 +00:00
blueswir1
c5adf6a88d Remove duplicated field 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4411 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 12:25:46 +00:00
bellard
7c60cc4bca suppressed fixed registers 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:58:20 +00:00
blueswir1
22548760ca Fix compiler warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:12:00 +00:00
blueswir1
64a88d5d3a CPU feature selection support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 20:13:43 +00:00
blueswir1
7fa76c0bf3 Complete the TCG conversion 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-04 11:58:45 +00:00
blueswir1
4b8b8b76d4 Document the shift values 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4243 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-23 17:12:35 +00:00
blueswir1
c48fcb4751 Move CPU stuff unrelated to translation to helper.c 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4133 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-29 15:46:56 +00:00
blueswir1
d9bdab86e8 Convert mulscc to TCG, add cc_src2 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4075 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-16 19:22:18 +00:00
blueswir1
dc99a3f2e8 Convert condition code changing versions of add, sub, logic, and div to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-13 20:45:31 +00:00
blueswir1
134d77a14b Convert exception ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-06 20:09:54 +00:00
blueswir1
375ee38b4b Convert Sparc64 trap state ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-05 17:59:48 +00:00
blueswir1
ccd4a21937 Convert tick operations to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-02 18:28:06 +00:00
blueswir1
9e31b9e28a Fix remote debugger memory access problems reported by Matthias Stein 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-14 17:46:44 +00:00
blueswir1
3deaeab717 Sparc32 MMU register fixes (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-11 18:27:33 +00:00
blueswir1
3ebf5aafe5 Use slavio base as boot prom address, rearrange sun4m init code 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3747 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-28 20:54:33 +00:00
blueswir1
1f58732916 128-bit float support for user mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 18:40:20 +00:00
blueswir1
3dd9a152e1 More MMU registers (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 12:43:10 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
blueswir1
6d5f237a59 CPU specific boot mode (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-07 17:03:37 +00:00
blueswir1
6f27aba62e Sparc64 hypervisor mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 17:07:21 +00:00
blueswir1
952a328ff5 SuperSparc MXCC support (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 16:29:21 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
j_mayer
c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths
198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h. 
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 16:44:32 +00:00
ths
a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 13:57:58 +00:00
blueswir1
40ce0a9a8f CPU boot mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 19:44:09 +00:00
blueswir1
0f8a249a0b Detabify 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 14:54:22 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
blueswir1
327ac2e797 Fix Sparc32 interrupt handling 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3110 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-04 10:50:30 +00:00
blueswir1
8f1f22f6ab Fix retry and done ops, trap handling 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3055 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-08 19:51:24 +00:00
blueswir1
17d996e1f1 Report normalised CWP values to userland and GDB, not internal representation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3052 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-07 20:53:22 +00:00
blueswir1
6ef905f69c Fix wrong number of clean/saveable windows, match Linux startup register values 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3050 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-07 20:48:42 +00:00
blueswir1
33b3780262 Fix Sparc64 page size 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3047 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-07 20:44:35 +00:00
ths
9467d44c4d Move target-specific defines to the target directories. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 21:02:38 +00:00
blueswir1
92b72cbcd5 Enable 36-bit physical address space also on 32-bit hosts 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2914 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 16:56:47 +00:00
blueswir1
1b2e93c175 Separate fault for code access to unassigned memory 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2876 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-27 19:36:00 +00:00
blueswir1
20c9f095c4 Implement Sparc64 CPU timers using ptimers 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2860 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-25 18:50:28 +00:00
blueswir1
5dcb6b914e Use full 36-bit physical address space on SS10 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 12:58:30 +00:00
blueswir1
6c36d3fa86 Enable faults for unassigned memory accesses and unimplemented ASIs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2824 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-17 19:30:10 +00:00
blueswir1
b4f0a316b5 Report unassigned memory access to CPU (not enabled yet) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2776 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-06 17:59:24 +00:00
blueswir1
e9ebed4d41 Sparc64 update: more VIS ops 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2714 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-22 19:14:52 +00:00
blueswir1
d2889a3efc Alignment check mechanism (not fully enabled yet) (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 15:46:16 +00:00
blueswir1
9143e59842 Fix stdfq op (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2604 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 18:12:08 +00:00
blueswir1
d4218d996d Fix Sparc lda/ldda/sta/stda asi handling, fault on misaligned register ldd/std and illegal cwp on wrpsr (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2568 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 15:15:36 +00:00
blueswir1
fcc72045e8 Fix Sparc co-processor ops (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2567 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 15:08:21 +00:00
blueswir1
62724a3773 Sparc32/64 CPU selection 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2534 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-25 07:55:52 +00:00
blueswir1
3e736bf4b4 Upgrade Sparc FPU version (based on patch by Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2532 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-24 13:24:09 +00:00
blueswir1
e32f879d1b Sparc tagged operations (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2531 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-23 20:01:20 +00:00
ths
5a7b542bbd siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2369 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-31 12:16:51 +00:00
ths
9042c0e20d Check ELF binaries for machine type and endianness. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-23 14:18:40 +00:00
bellard
725cb90bf7 sparc64 fixes (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2062 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-07-18 21:12:17 +00:00
bellard
a80dde0837 SPARC FPU optimization (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2023 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-26 19:53:29 +00:00
bellard
1bdb68ea13 fixed sparc64 cpu fp save/restore 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2001 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-21 18:48:01 +00:00
bellard
65ce8c2fb4 soft floats for SPARC (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2000 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-21 18:37:05 +00:00
bellard
ba3c64fb47 Initial SPARC SMP support (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1694 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-12-05 20:31:52 +00:00
bellard
a316d3353c added CPU_COMMON and CPUState.tb_jmp_cache[] 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-20 10:32:34 +00:00
bellard
8346901560 sparc64 fixes (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1514 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-23 14:27:54 +00:00
bellard
3475187dd8 sparc64 marge (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1462 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 14:31:34 +00:00
bellard
1fddef4b1b gdb support for user mode (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1367 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-04-17 19:16:13 +00:00
bellard
7a0e1f41ce soft float support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1336 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-03-13 17:01:47 +00:00
bellard
afc7df1148 PSR.PS fix (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1307 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-22 19:08:57 +00:00
bellard
1d6e34fd37 sparc Linux works better with NWINDOWS = 8 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1301 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-19 17:26:37 +00:00
bellard
878d3096d2 sparc fixes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1291 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-13 19:02:42 +00:00
bellard
9d89330183 clean up - comments 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1271 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-07 23:10:53 +00:00
bellard
af7bf89b1f initial sparc64 support - sparc fixes (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1251 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-01-30 22:39:04 +00:00
bellard
b4ff598727 removed warning 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1194 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-01-03 23:43:09 +00:00
bellard
e80cfcfc88 SPARC merge 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1179 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-12-19 23:18:01 +00:00