soft float support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1336 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
4ecc31906d
commit
7a0e1f41ce
@ -62,17 +62,6 @@ extern int fprintf(FILE *, const char *, ...);
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extern int printf(const char *, ...);
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#undef NULL
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#define NULL 0
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#if defined(_BSD) && !defined(__APPLE__)
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#include <ieeefp.h>
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#define FE_TONEAREST FP_RN
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#define FE_DOWNWARD FP_RM
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#define FE_UPWARD FP_RP
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#define FE_TOWARDZERO FP_RZ
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#define fesetround(x) fpsetround(x)
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#else
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#include <fenv.h>
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#endif
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#ifdef __i386__
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#define AREG0 "ebp"
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@ -36,6 +36,8 @@
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#include "cpu-defs.h"
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#include "softfloat.h"
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#if defined(__i386__) && !defined(CONFIG_SOFTMMU)
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#define USE_CODE_COPY
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#endif
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@ -332,14 +334,14 @@ enum {
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CC_OP_NB,
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};
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#if (defined(__i386__) || defined(__x86_64__)) && !defined(_BSD)
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#ifdef FLOATX80
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#define USE_X86LDOUBLE
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#endif
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#ifdef USE_X86LDOUBLE
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typedef long double CPU86_LDouble;
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typedef floatx80 CPU86_LDouble;
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#else
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typedef double CPU86_LDouble;
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typedef float64 CPU86_LDouble;
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#endif
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typedef struct SegmentCache {
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@ -354,8 +356,8 @@ typedef union {
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uint16_t _w[8];
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uint32_t _l[4];
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uint64_t _q[2];
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float _s[4];
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double _d[2];
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float32 _s[4];
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float64 _d[2];
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} XMMReg;
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typedef union {
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@ -441,6 +443,7 @@ typedef struct CPUX86State {
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} fpregs[8];
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/* emulator internal variables */
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float_status fp_status;
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CPU86_LDouble ft0;
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union {
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float f;
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@ -449,6 +452,7 @@ typedef struct CPUX86State {
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int64_t i64;
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} fp_convert;
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float_status sse_status;
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uint32_t mxcsr;
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XMMReg xmm_regs[CPU_NB_REGS];
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XMMReg xmm_t0;
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@ -139,44 +139,6 @@ extern int loglevel;
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#include "cpu.h"
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#include "exec-all.h"
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/* XXX: add a generic FPU library */
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static inline double float32_to_float64(float a)
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{
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return a;
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}
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static inline float float64_to_float32(double a)
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{
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return a;
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}
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#if defined(__powerpc__)
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/* better to call an helper on ppc */
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float int32_to_float32(int32_t a);
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double int32_to_float64(int32_t a);
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#else
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static inline float int32_to_float32(int32_t a)
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{
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return (float)a;
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}
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static inline double int32_to_float64(int32_t a)
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{
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return (double)a;
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}
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#endif
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static inline float int64_to_float32(int64_t a)
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{
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return (float)a;
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}
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static inline double int64_to_float64(int64_t a)
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{
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return (double)a;
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}
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typedef struct CCTable {
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int (*compute_all)(void); /* return all the flags */
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int (*compute_c)(void); /* return the C flag */
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@ -358,9 +320,11 @@ static inline void stfl(target_ulong ptr, float v)
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#ifdef USE_X86LDOUBLE
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/* use long double functions */
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#define lrint lrintl
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#define llrint llrintl
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#define fabs fabsl
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#define floatx_to_int32 floatx80_to_int32
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#define floatx_to_int64 floatx80_to_int64
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#define floatx_abs floatx80_abs
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#define floatx_chs floatx80_chs
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#define floatx_round_to_int floatx80_round_to_int
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#define sin sinl
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#define cos cosl
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#define sqrt sqrtl
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@ -370,17 +334,14 @@ static inline void stfl(target_ulong ptr, float v)
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#define atan2 atan2l
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#define floor floorl
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#define ceil ceill
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#define rint rintl
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#else
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#define floatx_to_int32 float64_to_int32
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#define floatx_to_int64 float64_to_int64
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#define floatx_abs float64_abs
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#define floatx_chs float64_chs
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#define floatx_round_to_int float64_round_to_int
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#endif
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#if !defined(_BSD)
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extern int lrint(CPU86_LDouble x);
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extern int64_t llrint(CPU86_LDouble x);
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#else
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#define lrint(d) ((int)rint(d))
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#define llrint(d) ((int)rint(d))
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#endif
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extern CPU86_LDouble fabs(CPU86_LDouble x);
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extern CPU86_LDouble sin(CPU86_LDouble x);
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extern CPU86_LDouble cos(CPU86_LDouble x);
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extern CPU86_LDouble sqrt(CPU86_LDouble x);
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@ -390,7 +351,6 @@ extern CPU86_LDouble tan(CPU86_LDouble x);
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extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
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extern CPU86_LDouble floor(CPU86_LDouble x);
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extern CPU86_LDouble ceil(CPU86_LDouble x);
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extern CPU86_LDouble rint(CPU86_LDouble x);
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#define RC_MASK 0xc00
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#define RC_NEAR 0x000
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@ -400,13 +360,6 @@ extern CPU86_LDouble rint(CPU86_LDouble x);
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#define MAXTAN 9223372036854775808.0
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#ifdef __arm__
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/* we have no way to do correct rounding - a FPU emulator is needed */
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#define FE_DOWNWARD FE_TONEAREST
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#define FE_UPWARD FE_TONEAREST
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#define FE_TOWARDZERO FE_TONEAREST
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#endif
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#ifdef USE_X86LDOUBLE
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/* only for x86 */
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@ -596,6 +549,7 @@ float approx_rsqrt(float a);
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float approx_rcp(float a);
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double helper_sqrt(double a);
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int fpu_isnan(double a);
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void update_fp_status(void);
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extern const uint8_t parity_table[256];
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extern const uint8_t rclw_table[32];
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@ -2541,13 +2541,11 @@ void helper_fbld_ST0_A0(void)
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void helper_fbst_ST0_A0(void)
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{
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CPU86_LDouble tmp;
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int v;
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target_ulong mem_ref, mem_end;
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int64_t val;
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tmp = rint(ST0);
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val = (int64_t)tmp;
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val = floatx_to_int64(ST0, &env->fp_status);
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mem_ref = A0;
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mem_end = mem_ref + 9;
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if (val < 0) {
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@ -2740,29 +2738,7 @@ void helper_fsincos(void)
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void helper_frndint(void)
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{
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CPU86_LDouble a;
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a = ST0;
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#ifdef __arm__
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switch(env->fpuc & RC_MASK) {
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default:
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case RC_NEAR:
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asm("rndd %0, %1" : "=f" (a) : "f"(a));
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break;
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case RC_DOWN:
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asm("rnddm %0, %1" : "=f" (a) : "f"(a));
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break;
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case RC_UP:
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asm("rnddp %0, %1" : "=f" (a) : "f"(a));
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break;
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case RC_CHOP:
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asm("rnddz %0, %1" : "=f" (a) : "f"(a));
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break;
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}
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#else
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a = rint(a);
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#endif
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ST0 = a;
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ST0 = floatx_round_to_int(ST0, &env->fp_status);
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}
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void helper_fscale(void)
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@ -3263,25 +3239,43 @@ float approx_rcp(float a)
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return 1.0 / a;
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}
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/* XXX: find a better solution */
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double helper_sqrt(double a)
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void update_fp_status(void)
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{
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return sqrt(a);
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}
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int rnd_type;
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/* XXX: move that to another file */
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#if defined(__powerpc__)
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/* better to call an helper on ppc */
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float int32_to_float32(int32_t a)
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{
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return (float)a;
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}
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double int32_to_float64(int32_t a)
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{
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return (double)a;
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}
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/* set rounding mode */
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switch(env->fpuc & RC_MASK) {
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default:
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case RC_NEAR:
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rnd_type = float_round_nearest_even;
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break;
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case RC_DOWN:
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rnd_type = float_round_down;
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break;
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case RC_UP:
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rnd_type = float_round_up;
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break;
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case RC_CHOP:
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rnd_type = float_round_to_zero;
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break;
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}
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set_float_rounding_mode(rnd_type, &env->fp_status);
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#ifdef FLOATX80
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switch((env->fpuc >> 8) & 3) {
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case 0:
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rnd_type = 32;
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break;
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case 2:
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rnd_type = 64;
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break;
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case 3:
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default:
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rnd_type = 80;
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break;
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}
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set_floatx80_rounding_precision(rnd_type, &env->fp_status);
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#endif
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}
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#if !defined(CONFIG_USER_ONLY)
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@ -1598,26 +1598,6 @@ CCTable cc_table[CC_OP_NB] = {
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functions comes from the LGPL'ed x86 emulator found in the Willows
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TWIN windows emulator. */
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#if defined(__powerpc__)
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extern CPU86_LDouble copysign(CPU86_LDouble, CPU86_LDouble);
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/* correct (but slow) PowerPC rint() (glibc version is incorrect) */
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double qemu_rint(double x)
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{
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double y = 4503599627370496.0;
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if (fabs(x) >= y)
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return x;
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if (x < 0)
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y = -y;
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y = (x + y) - y;
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if (y == 0.0)
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y = copysign(y, x);
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return y;
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}
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#define rint qemu_rint
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#endif
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/* fp load FT0 */
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void OPPROTO op_flds_FT0_A0(void)
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@ -1866,7 +1846,7 @@ void OPPROTO op_fist_ST0_A0(void)
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int val;
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d = ST0;
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val = lrint(d);
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val = floatx_to_int32(d, &env->fp_status);
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if (val != (int16_t)val)
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val = -32768;
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stw(A0, val);
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@ -1883,7 +1863,7 @@ void OPPROTO op_fistl_ST0_A0(void)
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int val;
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d = ST0;
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val = lrint(d);
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val = floatx_to_int32(d, &env->fp_status);
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stl(A0, val);
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FORCE_RET();
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}
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@ -1898,7 +1878,7 @@ void OPPROTO op_fistll_ST0_A0(void)
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int64_t val;
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d = ST0;
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val = llrint(d);
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val = floatx_to_int64(d, &env->fp_status);
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stq(A0, val);
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FORCE_RET();
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}
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@ -2101,12 +2081,12 @@ void OPPROTO op_fdivr_STN_ST0(void)
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/* misc FPU operations */
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void OPPROTO op_fchs_ST0(void)
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{
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ST0 = -ST0;
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ST0 = floatx_chs(ST0);
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}
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void OPPROTO op_fabs_ST0(void)
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{
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ST0 = fabs(ST0);
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ST0 = floatx_abs(ST0);
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}
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void OPPROTO op_fxam_ST0(void)
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@ -2251,25 +2231,8 @@ void OPPROTO op_fnstcw_A0(void)
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void OPPROTO op_fldcw_A0(void)
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{
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int rnd_type;
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env->fpuc = lduw(A0);
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/* set rounding mode */
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switch(env->fpuc & RC_MASK) {
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default:
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case RC_NEAR:
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rnd_type = FE_TONEAREST;
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break;
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case RC_DOWN:
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rnd_type = FE_DOWNWARD;
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break;
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case RC_UP:
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rnd_type = FE_UPWARD;
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break;
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case RC_CHOP:
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rnd_type = FE_TOWARDZERO;
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break;
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}
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fesetround(rnd_type);
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update_fp_status();
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}
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void OPPROTO op_fclex(void)
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@ -654,10 +654,10 @@ void OPPROTO op_ ## name ## ps (void)\
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Reg *d, *s;\
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d = (Reg *)((char *)env + PARAM1);\
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s = (Reg *)((char *)env + PARAM2);\
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d->XMM_S(0) = F(d->XMM_S(0), s->XMM_S(0));\
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d->XMM_S(1) = F(d->XMM_S(1), s->XMM_S(1));\
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d->XMM_S(2) = F(d->XMM_S(2), s->XMM_S(2));\
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d->XMM_S(3) = F(d->XMM_S(3), s->XMM_S(3));\
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d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
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d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
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d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
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d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
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}\
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\
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void OPPROTO op_ ## name ## ss (void)\
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@ -665,15 +665,15 @@ void OPPROTO op_ ## name ## ss (void)\
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Reg *d, *s;\
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d = (Reg *)((char *)env + PARAM1);\
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s = (Reg *)((char *)env + PARAM2);\
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d->XMM_S(0) = F(d->XMM_S(0), s->XMM_S(0));\
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d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
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}\
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void OPPROTO op_ ## name ## pd (void)\
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{\
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Reg *d, *s;\
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d = (Reg *)((char *)env + PARAM1);\
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s = (Reg *)((char *)env + PARAM2);\
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d->XMM_D(0) = F(d->XMM_D(0), s->XMM_D(0));\
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d->XMM_D(1) = F(d->XMM_D(1), s->XMM_D(1));\
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d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
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d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
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}\
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\
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void OPPROTO op_ ## name ## sd (void)\
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@ -681,16 +681,16 @@ void OPPROTO op_ ## name ## sd (void)\
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Reg *d, *s;\
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d = (Reg *)((char *)env + PARAM1);\
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s = (Reg *)((char *)env + PARAM2);\
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d->XMM_D(0) = F(d->XMM_D(0), s->XMM_D(0));\
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d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
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}
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#define FPU_ADD(a, b) (a) + (b)
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#define FPU_SUB(a, b) (a) - (b)
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#define FPU_MUL(a, b) (a) * (b)
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#define FPU_DIV(a, b) (a) / (b)
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#define FPU_MIN(a, b) (a) < (b) ? (a) : (b)
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#define FPU_MAX(a, b) (a) > (b) ? (a) : (b)
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#define FPU_SQRT(a, b) helper_sqrt(b)
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#define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
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#define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
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#define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
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#define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
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#define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b)
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#define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b)
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#define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
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SSE_OP_S(add, FPU_ADD)
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SSE_OP_S(sub, FPU_SUB)
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@ -710,8 +710,8 @@ void OPPROTO op_cvtps2pd(void)
|
||||
s = (Reg *)((char *)env + PARAM2);
|
||||
s0 = s->XMM_S(0);
|
||||
s1 = s->XMM_S(1);
|
||||
d->XMM_D(0) = float32_to_float64(s0);
|
||||
d->XMM_D(1) = float32_to_float64(s1);
|
||||
d->XMM_D(0) = float32_to_float64(s0, &env->sse_status);
|
||||
d->XMM_D(1) = float32_to_float64(s1, &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtpd2ps(void)
|
||||
@ -719,8 +719,8 @@ void OPPROTO op_cvtpd2ps(void)
|
||||
Reg *d, *s;
|
||||
d = (Reg *)((char *)env + PARAM1);
|
||||
s = (Reg *)((char *)env + PARAM2);
|
||||
d->XMM_S(0) = float64_to_float32(s->XMM_D(0));
|
||||
d->XMM_S(1) = float64_to_float32(s->XMM_D(1));
|
||||
d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
|
||||
d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status);
|
||||
d->Q(1) = 0;
|
||||
}
|
||||
|
||||
@ -729,7 +729,7 @@ void OPPROTO op_cvtss2sd(void)
|
||||
Reg *d, *s;
|
||||
d = (Reg *)((char *)env + PARAM1);
|
||||
s = (Reg *)((char *)env + PARAM2);
|
||||
d->XMM_D(0) = float32_to_float64(s->XMM_S(0));
|
||||
d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtsd2ss(void)
|
||||
@ -737,7 +737,7 @@ void OPPROTO op_cvtsd2ss(void)
|
||||
Reg *d, *s;
|
||||
d = (Reg *)((char *)env + PARAM1);
|
||||
s = (Reg *)((char *)env + PARAM2);
|
||||
d->XMM_S(0) = float64_to_float32(s->XMM_D(0));
|
||||
d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
|
||||
}
|
||||
|
||||
/* integer to float */
|
||||
@ -745,10 +745,10 @@ void OPPROTO op_cvtdq2ps(void)
|
||||
{
|
||||
XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->XMM_S(0) = int32_to_float32(s->XMM_L(0));
|
||||
d->XMM_S(1) = int32_to_float32(s->XMM_L(1));
|
||||
d->XMM_S(2) = int32_to_float32(s->XMM_L(2));
|
||||
d->XMM_S(3) = int32_to_float32(s->XMM_L(3));
|
||||
d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status);
|
||||
d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status);
|
||||
d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status);
|
||||
d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtdq2pd(void)
|
||||
@ -758,49 +758,49 @@ void OPPROTO op_cvtdq2pd(void)
|
||||
int32_t l0, l1;
|
||||
l0 = (int32_t)s->XMM_L(0);
|
||||
l1 = (int32_t)s->XMM_L(1);
|
||||
d->XMM_D(0) = int32_to_float64(l0);
|
||||
d->XMM_D(1) = int32_to_float64(l1);
|
||||
d->XMM_D(0) = int32_to_float64(l0, &env->sse_status);
|
||||
d->XMM_D(1) = int32_to_float64(l1, &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtpi2ps(void)
|
||||
{
|
||||
XMMReg *d = (Reg *)((char *)env + PARAM1);
|
||||
MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
||||
d->XMM_S(0) = int32_to_float32(s->MMX_L(0));
|
||||
d->XMM_S(1) = int32_to_float32(s->MMX_L(1));
|
||||
d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
|
||||
d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtpi2pd(void)
|
||||
{
|
||||
XMMReg *d = (Reg *)((char *)env + PARAM1);
|
||||
MMXReg *s = (MMXReg *)((char *)env + PARAM2);
|
||||
d->XMM_D(0) = int32_to_float64(s->MMX_L(0));
|
||||
d->XMM_D(1) = int32_to_float64(s->MMX_L(1));
|
||||
d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
|
||||
d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtsi2ss(void)
|
||||
{
|
||||
XMMReg *d = (Reg *)((char *)env + PARAM1);
|
||||
d->XMM_S(0) = int32_to_float32(T0);
|
||||
d->XMM_S(0) = int32_to_float32(T0, &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtsi2sd(void)
|
||||
{
|
||||
XMMReg *d = (Reg *)((char *)env + PARAM1);
|
||||
d->XMM_D(0) = int32_to_float64(T0);
|
||||
d->XMM_D(0) = int32_to_float64(T0, &env->sse_status);
|
||||
}
|
||||
|
||||
#ifdef TARGET_X86_64
|
||||
void OPPROTO op_cvtsq2ss(void)
|
||||
{
|
||||
XMMReg *d = (Reg *)((char *)env + PARAM1);
|
||||
d->XMM_S(0) = int64_to_float32(T0);
|
||||
d->XMM_S(0) = int64_to_float32(T0, &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtsq2sd(void)
|
||||
{
|
||||
XMMReg *d = (Reg *)((char *)env + PARAM1);
|
||||
d->XMM_D(0) = int64_to_float64(T0);
|
||||
d->XMM_D(0) = int64_to_float64(T0, &env->sse_status);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -809,18 +809,18 @@ void OPPROTO op_cvtps2dq(void)
|
||||
{
|
||||
XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->XMM_L(0) = lrint(s->XMM_S(0));
|
||||
d->XMM_L(1) = lrint(s->XMM_S(1));
|
||||
d->XMM_L(2) = lrint(s->XMM_S(2));
|
||||
d->XMM_L(3) = lrint(s->XMM_S(3));
|
||||
d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
|
||||
d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
|
||||
d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status);
|
||||
d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtpd2dq(void)
|
||||
{
|
||||
XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->XMM_L(0) = lrint(s->XMM_D(0));
|
||||
d->XMM_L(1) = lrint(s->XMM_D(1));
|
||||
d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
|
||||
d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
|
||||
d->XMM_Q(1) = 0;
|
||||
}
|
||||
|
||||
@ -828,41 +828,41 @@ void OPPROTO op_cvtps2pi(void)
|
||||
{
|
||||
MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->MMX_L(0) = lrint(s->XMM_S(0));
|
||||
d->MMX_L(1) = lrint(s->XMM_S(1));
|
||||
d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
|
||||
d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtpd2pi(void)
|
||||
{
|
||||
MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->MMX_L(0) = lrint(s->XMM_D(0));
|
||||
d->MMX_L(1) = lrint(s->XMM_D(1));
|
||||
d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
|
||||
d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtss2si(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = (int32_t)lrint(s->XMM_S(0));
|
||||
T0 = float32_to_int32(s->XMM_S(0), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtsd2si(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = (int32_t)lrint(s->XMM_D(0));
|
||||
T0 = float64_to_int32(s->XMM_D(0), &env->sse_status);
|
||||
}
|
||||
|
||||
#ifdef TARGET_X86_64
|
||||
void OPPROTO op_cvtss2sq(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = llrint(s->XMM_S(0));
|
||||
T0 = float32_to_int64(s->XMM_S(0), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvtsd2sq(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = llrint(s->XMM_D(0));
|
||||
T0 = float64_to_int64(s->XMM_D(0), &env->sse_status);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -871,18 +871,18 @@ void OPPROTO op_cvttps2dq(void)
|
||||
{
|
||||
XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->XMM_L(0) = (int32_t)s->XMM_S(0);
|
||||
d->XMM_L(1) = (int32_t)s->XMM_S(1);
|
||||
d->XMM_L(2) = (int32_t)s->XMM_S(2);
|
||||
d->XMM_L(3) = (int32_t)s->XMM_S(3);
|
||||
d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
|
||||
d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
|
||||
d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status);
|
||||
d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvttpd2dq(void)
|
||||
{
|
||||
XMMReg *d = (XMMReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->XMM_L(0) = (int32_t)s->XMM_D(0);
|
||||
d->XMM_L(1) = (int32_t)s->XMM_D(1);
|
||||
d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
|
||||
d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
|
||||
d->XMM_Q(1) = 0;
|
||||
}
|
||||
|
||||
@ -890,41 +890,41 @@ void OPPROTO op_cvttps2pi(void)
|
||||
{
|
||||
MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->MMX_L(0) = (int32_t)(s->XMM_S(0));
|
||||
d->MMX_L(1) = (int32_t)(s->XMM_S(1));
|
||||
d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
|
||||
d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvttpd2pi(void)
|
||||
{
|
||||
MMXReg *d = (MMXReg *)((char *)env + PARAM1);
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM2);
|
||||
d->MMX_L(0) = (int32_t)(s->XMM_D(0));
|
||||
d->MMX_L(1) = (int32_t)(s->XMM_D(1));
|
||||
d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
|
||||
d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvttss2si(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = (int32_t)(s->XMM_S(0));
|
||||
T0 = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvttsd2si(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = (int32_t)(s->XMM_D(0));
|
||||
T0 = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
|
||||
}
|
||||
|
||||
#ifdef TARGET_X86_64
|
||||
void OPPROTO op_cvttss2sq(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = (int64_t)(s->XMM_S(0));
|
||||
T0 = float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status);
|
||||
}
|
||||
|
||||
void OPPROTO op_cvttsd2sq(void)
|
||||
{
|
||||
XMMReg *s = (XMMReg *)((char *)env + PARAM1);
|
||||
T0 = (int64_t)(s->XMM_D(0));
|
||||
T0 = float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -15,6 +15,8 @@
|
||||
|
||||
#include "cpu-defs.h"
|
||||
|
||||
#include "softfloat.h"
|
||||
|
||||
/*#define EXCP_INTERRUPT 0x100*/
|
||||
|
||||
/* trap definitions */
|
||||
@ -150,6 +152,7 @@ typedef struct CPUSPARCState {
|
||||
/* temporary float registers */
|
||||
float ft0, ft1, ft2;
|
||||
double dt0, dt1, dt2;
|
||||
float_status fp_status;
|
||||
#if defined(TARGET_SPARC64)
|
||||
target_ulong t0, t1, t2;
|
||||
#endif
|
||||
|
@ -1,5 +1,3 @@
|
||||
#include <math.h>
|
||||
#include <fenv.h>
|
||||
#include "exec.h"
|
||||
|
||||
//#define DEBUG_MMU
|
||||
@ -24,17 +22,17 @@ void do_fitod(void)
|
||||
|
||||
void do_fabss(void)
|
||||
{
|
||||
FT0 = fabsf(FT1);
|
||||
FT0 = float32_abs(FT1);
|
||||
}
|
||||
|
||||
void do_fsqrts(void)
|
||||
{
|
||||
FT0 = sqrtf(FT1);
|
||||
FT0 = float32_sqrt(FT1, &env->fp_status);
|
||||
}
|
||||
|
||||
void do_fsqrtd(void)
|
||||
{
|
||||
DT0 = sqrt(DT1);
|
||||
DT0 = float64_sqrt(DT1, &env->fp_status);
|
||||
}
|
||||
|
||||
void do_fcmps (void)
|
||||
@ -252,20 +250,22 @@ void helper_rett()
|
||||
|
||||
void helper_ldfsr(void)
|
||||
{
|
||||
int rnd_mode;
|
||||
switch (env->fsr & FSR_RD_MASK) {
|
||||
case FSR_RD_NEAREST:
|
||||
fesetround(FE_TONEAREST);
|
||||
rnd_mode = float_round_nearest_even;
|
||||
break;
|
||||
case FSR_RD_ZERO:
|
||||
fesetround(FE_TOWARDZERO);
|
||||
rnd_mode = float_round_to_zero;
|
||||
break;
|
||||
case FSR_RD_POS:
|
||||
fesetround(FE_UPWARD);
|
||||
rnd_mode = float_round_up;
|
||||
break;
|
||||
case FSR_RD_NEG:
|
||||
fesetround(FE_DOWNWARD);
|
||||
rnd_mode = float_round_down;
|
||||
break;
|
||||
}
|
||||
set_float_rounding_mode(rnd_mode, &env->fp_status);
|
||||
}
|
||||
|
||||
void cpu_get_fp64(uint64_t *pmant, uint16_t *pexp, double f)
|
||||
|
Loading…
Reference in New Issue
Block a user