Commit Graph

13285 Commits

Author SHA1 Message Date
Peter Maydell
b12c390b91 target-arm: Set softfloat cumulative exc flags from correct FPSCR bits
When handling a write to the ARM FPSCR, set the softfloat cumulative
exception flags from the cumulative flags in the FPSCR, not the
exception-enable bits. Also don't apply a mask: vfp_exceptbits_to_host
will only look at the correct bits anyway.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:59 +01:00
Peter Maydell
37d18660bb softfloat: Implement flushing input denormals to zero
Add support to softfloat for flushing input denormal float32 and float64
to zero. softfloat's existing 'flush_to_zero' flag only flushes denormals
to zero on output. Some CPUs need input denormals to be flushed before
processing as well. Implement this, using a new status flag to enable it
and a new exception status bit to indicate when it has happened. Existing
CPUs should be unaffected as there is no behaviour change unless the
mode is enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:59 +01:00
Aurelien Jarno
838fa72d0b target-arm: fix SMMLA/SMMLS instructions
SMMLA and SMMLS are broken on both in normal and thumb mode, that is
both (different) implementations are wrong. They try to avoid a 64-bit
add for the rounding, which is not trivial if you want to support both
SMMLA and SMMLS with the same code.

The code below uses the same implementation for both modes, using the
code from the ARM manual. It also fixes the thumb decoding that was a
mix between normal and thumb mode.

This fixes the issues reported in
https://bugs.launchpad.net/qemu/+bug/629298

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:46 +01:00
Blue Swirl
71df0eeb98 block: delete a write-only variable
Avoid a warning with GCC 4.6.0:
/src/qemu/block.c: In function 'bdrv_img_create':
/src/qemu/block.c:2862:25: error: variable 'fmt' set but not used [-Werror=unused-but-set-variable]

CC: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-06 18:25:37 +00:00
Blue Swirl
3fbb33d08d cirrus_vga: Declare as little endian
This patch replaces explicit bswaps with endianness hints to the
mmio layer.

CC: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-06 18:25:26 +00:00
Blue Swirl
4b78a802ff pc: move port 92 stuff back to pc.c from pckbd.c
956a3e6bb7 introduced a bug concerning
reset bit for port 92.

Since the keyboard output port and port 92 are not compatible anyway,
let's separate them.

Reported-by: Peter Lieven <pl@dlh.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
--
v2: added reset handler and VMState
2011-01-06 18:24:35 +00:00
Aurelien Jarno
e024e881bb target-ppc: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for PowerPC targets by
providing an appropriate pickNaN function.

Also fix the #ifdef tests for default NaN definition, the correct name
is TARGET_PPC instead of TARGET_POWERPC.

Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:42 +01:00
Aurelien Jarno
084d19ba71 target-mips: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for MIPS targets by
providing an appropriate pickNaN function.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:35 +01:00
Aurelien Jarno
1f398e0825 softfloat: use float{32,64,x80,128}_maybe_silence_nan()
Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling the
sNaN bit manually. This allow per target implementation of sNaN to qNaN
conversion.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2011-01-06 16:29:29 +01:00
Aurelien Jarno
f6a7d92aed softfloat: add float{x80,128}_maybe_silence_nan()
Add float{x80,128}_maybe_silence_nan() functions, they will be need by
propagateFloat{x80,128}NaN().

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:23 +01:00
Aurelien Jarno
93ae1c6fea softfloat: fix float{32,64}_maybe_silence_nan() for MIPS
On targets that define sNaN with the sNaN bit as one, simply clearing
this bit may correspond to an infinite value.

Convert it to a default NaN if SNAN_BIT_IS_ONE, as it corresponds to
the MIPS implementation, the only emulated CPU with SNAN_BIT_IS_ONE.
When other CPU of this type are added, this might be updated to include
more cases.

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:17 +01:00
Aurelien Jarno
d735d695e7 softfloat: rename *IsNaN variables to *IsQuietNaN
Similarly to what has been done in commit
185698715d rename the misnamed *IsNaN
variables into *IsQuietNaN.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:11 +01:00
Aurelien Jarno
34d2386198 softfloat: remove HPPA specific code
We don't have any HPPA target, so let's remove HPPA specific code. It
can be re-added when someone adds an HPPA target.

This has been blessed by Stuart Brady <sdb@zubnet.me.uk>, author of the
target-hppa fork.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:05 +01:00
Aurelien Jarno
82b323cd29 target-ppc: use float32_is_any_nan()
Use the new function float32_is_any_nan() instead of
float32_is_quiet_nan() || float32_is_signaling_nan().

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:12:14 +01:00
Aurelien Jarno
3eb28bbd47 target-ppc: fix default qNaN
On PPC the default qNaN doesn't have the sign bit set.

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:10:54 +01:00
Aurelien Jarno
dd94ad96e5 target-ppc: remove PRECISE_EMULATION define
The PRECISE_EMULATION is "hardcoded" to one in target-ppc/exec.h and not
something easily tunable. Remove it and non-precise emulation code as
it doesn't make a noticeable difference in speed. People wanting speed
improvement should use softfloat-native instead.

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:10:48 +01:00
Edgar E. Iglesias
23979dc541 microblaze: Use more TB chaining
For some workloads with tight loops this ~doubles the emulation
speed.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
2011-01-05 02:23:09 +01:00
Aurelien Jarno
92d675d1c1 cirrus_vga: fix division by 0 for color expansion rop
Commit d85d0d3883 introduces a regression
with Windows ME that leads to a division by 0 and a crash.

It uses the color expansion rop with the source pitch set to 0. This is
something allowed, as the manual explicitely says "When the source of
color-expand data is display memory, the source pitch is ignored.".

This patch fixes this regression by computing sx, sy and others
variables only if they are going to be used later, that is for a plain
copy ROP. It basically consists in moving code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-04 21:58:24 +01:00
Aurelien Jarno
9ae19b657e Fix curses on big endian hosts
On big endian hosts, the curses interface is unusable: the emulated
graphic card only displays garbage, while the monitor interface displays
nothing (or rather only spaces).

The curses interface is waiting for data in native endianness, so
console_write_ch() should not do any conversion. The conversion should
be done when reading the video buffer in hw/vga.c. I supposed this
buffer is in little endian mode, though it's not impossible that the
data is actually in guest endianness. I currently have no big endian
guest to way (they all switch to graphic mode immediately).

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-04 21:58:24 +01:00
Michael Walle
8a7d0890ac noaudio: correctly account acquired samples
This will fix the return value of the function which otherwise returns too
many samples because sw->total_hw_samples_acquired isn't correctly
accounted.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: malc <av1474@comtv.ru>
2011-01-04 03:53:47 +03:00
Peter Maydell
011da610ba target-arm: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for ARM targets by
providing an appropriate pickNaN function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02 23:59:03 +01:00
Peter Maydell
354f211b1a softfloat: abstract out target-specific NaN propagation rules
IEEE754 doesn't specify precisely what NaN should be returned as
the result of an operation on two input NaNs. This is therefore
target-specific. Abstract out the code in propagateFloat*NaN()
which was implementing the x87 propagation rules, so that it
can be easily replaced on a per-target basis.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02 23:58:57 +01:00
Peter Maydell
185698715d softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()
The softfloat functions float*_is_nan() were badly misnamed,
because they return true only for quiet NaNs, not for all NaNs.
Rename them to float*_is_quiet_nan() to more accurately reflect
what they do.

This change was produced by:
 perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan)
(with the results manually checked.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02 11:15:25 +01:00
Aurelien Jarno
f96a38347a TCG: Improve tb_phys_hash_func()
Most of emulated CPU have instructions aligned on 16 or 32 bits, while
on others GCC tries to align the target jump location. This means that
1/2 or 3/4 of tb_phys_hash entries are never used.

Update the hash function tb_phys_hash_func() to ignore the two lowest
bits of the address. This brings a 6% speed-up when booting a MIPS
image.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-31 22:23:38 +01:00
Aurelien Jarno
8aac08b10b target-arm: fix UMAAL instruction
UMAAL should use unsigned multiply instead of signed.

This patch fixes this issue by handling UMAAL separately from
UMULL/UMLAL/SMULL/SMLAL as these instructions are different
enough. It also explicitly list instructions in case and catch
nonexistent instruction as illegal. Also fixes a few style issues.

This fixes the issues reported in
https://bugs.launchpad.net/qemu/+bug/696015

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-31 22:22:26 +01:00
Mike Pall
6d5c34fa02 Fix translation of unary PPC/SPE instructions (efdneg etc.).
Signed-off-by: Mike Pall <mike-lp10@luajit.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-31 21:17:53 +01:00
Aurelien Jarno
0fcec41eec target-sparc: fix udiv(cc) and sdiv(cc)
Since commit 5a4bb580cd, Xorg crashes on
a Debian Etch image. The commit itself is fine, but it triggers a bug
due to wrong computation of flags for udiv(cc) and sdiv(cc).

This patch only compute cc_src2 for the cc version of udiv/sdiv. It
also moves the update of cc_dst and cc_op to the helper, as it is
faster doing it here when there is already an helper.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-28 18:44:51 +00:00
Aurelien Jarno
818c2e1b97 Merge branch 'spice.v23.pull' of git://anongit.freedesktop.org/spice/qemu
* 'spice.v23.pull' of git://anongit.freedesktop.org/spice/qemu:
  vnc/spice: add set_passwd monitor command.
  vnc: support password expire
  vnc: auth reject cleanup
  spice: add qmp 'query-spice' and hmp 'info spice' commands.
  spice: connection events.
  spice: add qxl device
  spice: add qxl vgabios binary.
2010-12-27 22:59:48 +01:00
Jan Kiszka
4058fd98fd x86: Filter out garbage from segment flags dump
Only bits 8..23 of the segment flags contain valid data, so only dump
those when printing the CPU state.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 22:02:52 +01:00
Luiz Capitulino
5569fd7c38 Fix migrate set speed doc arg
We used to ignore any fractional part in 0.13, but due to recent
changes (started with 9f9b17a4f0)
migrate_set_speed will reject the fractional part.

We don't expect existing clients to be relying on this, but we
need to update the documentation to reflect the change.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:43:56 +01:00
Juha Riihimäki
16440c5fa0 target-arm: correct cp15 c1_sys reset value for arm1136 and cortex-a9
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:21:17 +01:00
Mattias Holm
9c486ad6e4 target-arm: correct cp15 c1_sys reset value for cortex-a8
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:21:17 +01:00
Juha Riihimäki
c003432809 target-arm: fix vmsav6 access control
Override access control checks (including execute) for mmu translation
table descriptors assigned to manager domains.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:21:16 +01:00
Peter Maydell
a5d88f3e03 target-arm: Correct result in saturating cases for VQSHL of s8/16/32
Where VQSHL of a signed 8/16/32 bit value saturated, the result
value was not being calculated correctly (it should be either
the minimum or maximum value for the size of the signed type).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:07:24 +01:00
Juha Riihimäki
620d791e34 target-arm: remove pointless else clause in VQSHL of u64
Remove a pointless else clause in the neon_qshl_u64 helper.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:07:16 +01:00
Peter Maydell
eb7a3d7964 target-arm: Fix VQSHL of signed 64 bit values by shift counts >= 64
VQSHL of a signed 64 bit non-zero value by a shift count >= 64 should
saturate; return the correct value in this case.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:07:10 +01:00
Juha Riihimäki
4c9b70aeca target-arm: Fix VQSHL of signed 64 bit values
Add a missing '-' which meant that we were misinterpreting the shift
argument for VQSHL of 64 bit signed values and treating almost every
shift value as if it were an extremely large right shift.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:07:03 +01:00
Juha Riihimäki
def126ce37 target-arm: Fix arguments passed to VQSHL helpers
Correct the arguments passed when generating neon qshl_{u,s}64()
helpers so that we use the correct registers.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:06:55 +01:00
Aurelien Jarno
1a855029af target-arm: fix bug in translation of REVSH
The translation of REVSH shifted the low byte 8 steps left before performing
an 8-bit sign extend, causing this part of the expression to alwas be 0.

Reported-by: Johan Bengtsson <teofrastius@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 19:56:43 +01:00
Aurelien Jarno
5697f6ae41 Fix a missing trailing newline
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 18:29:20 +01:00
Aurelien Jarno
4cdc1cd137 target-mips: fix host CPU consumption when guest is idle
When the CPU is in wait state, do not wake-up if an interrupt can't be
taken. This avoid host CPU running at 100% if a device (e.g. timer) has
an interrupt line left enabled.

Also factorize code to check if interrupts are enabled in
cpu_mips_hw_interrupts_pending().

Based on a patch from Edgar E. Iglesias <edgar.iglesias@gmail.com>

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-12-27 00:58:06 +01:00
Alexander Graf
6c33286ad3 s390: compile fixes
The s390 target doesn't compile out of the box anymore. This patch fixes all
the obvious glitches that got introduced in the last few weeks.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-26 00:29:49 +01:00
Nathan Froyd
9ed5726c04 target-mips: fix translation of MT instructions
The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of:

  int x;
  ...		/* no initialization of x */
  x = f (x);

which confused later bits of TCG rather badly, leading to crashes.

Fix the helpers to only return results (those instructions have no
inputs), and fix the translation code accordingly.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-22 11:14:10 +01:00
Brad
cbb608a5c8 Use mmap() within code_gen_alloc() for OpenBSD.
Signed-off-by: Brad Smith <brad@comstyle.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-21 19:44:54 +00:00
Brad
7ae63a517f Add OpenBSD to ifdef list since it has CLOCK_MONOTONIC.
Signed-off-by: Brad Smith <brad@comstyle.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-21 19:44:42 +00:00
Brad
5f668643dc Add support for OpenBSD to QEMU's tap driver.
Signed-off-by: Brad Smith <brad@comstyle.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-21 19:44:33 +00:00
Aurelien Jarno
4a1e19ae05 tcg-arm: fix __clear_cache() warning
Use __builtin___clear_cache() instead of __clear_cache() to avoid having
to define the function as extern. Fix the following warning:

| In file included from qemu/cpus.c:34:
| qemu/exec-all.h: In function 'tb_set_jmp_target1':
| qemu/exec-all.h:208: error: nested extern declaration of '__clear_cache'
| make[1]: *** [cpus.o] Error 1
| make: *** [subdir-i386-softmmu] Error 2

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-21 19:32:49 +01:00
Stefan Weil
fcd61af663 qdev: sysbus_get_default must not return a NULL pointer (fix regression)
Every system should have some sort of main system bus,
so sysbus_get_default should always return a valid bus.

Without this patch, at least mipssim and malta no longer
start but raise a null pointer access exception (caused by
commit ec990eb622).

Cc: Anthony Liguori <anthony@codemonkey.ws>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-21 18:28:19 +01:00
Bob Breuer
e0087e6185 sparc32: ledma extra registers need tracing too
Also trace the extra registers, and update the comments with new
info from Artyom Tarasenko.

Signed-off-by: Bob Breuer <breuerr@mc.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-20 21:08:07 +00:00
Andreas Färber
ac6c41204f target-i386: Fix accidental use of SoftFloat uint64 type
softfloat.h's uint64 type has least-width semantics.
Use uint64_t instead since that is used in helpers.

v4:
* Summary change.

v3:
* Split off.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Acked-by: Huang Ying <ying.huang@intel.com>
Acked-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-20 21:03:19 +00:00