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69 Commits

Author SHA1 Message Date
blueswir1
375ee38b4b Convert Sparc64 trap state ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-05 17:59:48 +00:00
blueswir1
7e8c2b6ca8 Convert float helpers to TCG, fix fabsq in the process 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-04 20:00:18 +00:00
blueswir1
1a2fb1c009 Modify Sparc32/64 to use TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-24 14:10:06 +00:00
blueswir1
3deaeab717 Sparc32 MMU register fixes (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-11 18:27:33 +00:00
blueswir1
045380be94 More ASIs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-01 17:07:39 +00:00
blueswir1
0b09be2b2f Nicer debug output for exceptions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3878 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-30 17:13:01 +00:00
blueswir1
7d85892b9b Initial support for Sun4d machines (SS-1000, SS-2000) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3869 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-28 20:57:43 +00:00
blueswir1
8543e2cfce Improved ASI debugging (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3868 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-28 18:50:23 +00:00
blueswir1
666c87aa3b Add ASIs (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3801 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-10 19:58:20 +00:00
blueswir1
9c2b428ee1 Fix compilation and warnings on PPC host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-28 18:08:28 +00:00
blueswir1
1f58732916 128-bit float support for user mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 18:40:20 +00:00
blueswir1
3dd9a152e1 More MMU registers (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 12:43:10 +00:00
blueswir1
d07b4d0ea7 Fix MXCC register 64 bit read word order (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-19 19:14:10 +00:00
pbrook
87ecb68bdf Break up vl.h. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 17:14:51 +00:00
blueswir1
2761992d13 Remove unnecessary register masking (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3663 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 08:21:43 +00:00
blueswir1
bbf7d96b45 Fix MXCC error register (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3662 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 08:19:57 +00:00
blueswir1
295db11371 Add MXCC module reset register (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3661 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 08:18:59 +00:00
bellard
bd37ec2141 removed warning 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-11 19:50:22 +00:00
blueswir1
6d5f237a59 CPU specific boot mode (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-07 17:03:37 +00:00
ths
273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored"). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 14:39:49 +00:00
blueswir1
eed152bba5 Use shared ctpop64 helper 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3468 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 14:35:04 +00:00
blueswir1
20b749f607 Avoid gcc warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3412 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 07:09:08 +00:00
blueswir1
1e64e78d0c Fix compiling Sparc64 on PPC host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3411 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 07:07:47 +00:00
blueswir1
e909ec2f11 Use ldq and stq for 8 byte accesses (original patch by Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3405 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 17:37:13 +00:00
blueswir1
94ced07534 Fix bug in Sparc32 sta op (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3399 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 20:27:00 +00:00
blueswir1
6f27aba62e Sparc64 hypervisor mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 17:07:21 +00:00
blueswir1
952a328ff5 SuperSparc MXCC support (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 16:29:21 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
blueswir1
51996525c7 Fix block load ASIs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3310 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-01 17:07:58 +00:00
blueswir1
3391c81801 Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3298 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 19:38:12 +00:00
blueswir1
40ce0a9a8f CPU boot mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 19:44:09 +00:00
blueswir1
e32664fbd2 Add missing break statements 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3208 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-23 11:40:57 +00:00
blueswir1
81ad8ba242 Rework ASI instructions (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-21 19:10:53 +00:00
blueswir1
0f8a249a0b Detabify 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 14:54:22 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
blueswir1
8f1f22f6ab Fix retry and done ops, trap handling 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3055 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-08 19:51:24 +00:00
blueswir1
17d996e1f1 Report normalised CWP values to userland and GDB, not internal representation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3052 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-07 20:53:22 +00:00
blueswir1
d8bdf5fa13 Sparc64 linux-user build fix 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2913 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 16:45:59 +00:00
blueswir1
1b2e93c175 Separate fault for code access to unassigned memory 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2876 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-27 19:36:00 +00:00
blueswir1
20c9f095c4 Implement Sparc64 CPU timers using ptimers 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2860 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-25 18:50:28 +00:00
blueswir1
5dcb6b914e Use full 36-bit physical address space on SS10 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 12:58:30 +00:00
blueswir1
6c36d3fa86 Enable faults for unassigned memory accesses and unimplemented ASIs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2824 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-17 19:30:10 +00:00
blueswir1
9455455016 Enable unaligned access faults 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2782 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-07 18:05:05 +00:00
blueswir1
d2889a3efc Alignment check mechanism (not fully enabled yet) (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 15:46:16 +00:00
blueswir1
417454b032 Full implementation of IEEE exceptions (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2625 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 20:03:29 +00:00
blueswir1
d4218d996d Fix Sparc lda/ldda/sta/stda asi handling, fault on misaligned register ldd/std and illegal cwp on wrpsr (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2568 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 15:15:36 +00:00
ths
ec2309289d sparc-softmmu build fix 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2219 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 15:51:39 +00:00
bellard
26a76461f2 C99 64 bit printf 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-25 18:15:32 +00:00
bellard
65ce8c2fb4 soft floats for SPARC (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2000 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-21 18:37:05 +00:00