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Fix MXCC register 64 bit read word order (Robert Reif)

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2007-11-19 19:14:10 +00:00
parent 8d162c2b68
commit d07b4d0ea7
1 changed files with 4 additions and 4 deletions
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8
target-sparc/op_helper.c
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@ -196,8 +196,8 @@ void helper_ld_asi(int asi, int size, int sign)
switch (T0) {
case 0x01c00a00: /* MXCC control register */
if (size == 8) {
ret = env->mxccregs[3];
T0 = env->mxccregs[3] >> 32;
ret = env->mxccregs[3] >> 32;
T0 = env->mxccregs[3];
} else
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
break;
@ -217,8 +217,8 @@ void helper_ld_asi(int asi, int size, int sign)
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
ret = env->mxccregs[7];
T0 = env->mxccregs[7] >> 32;
ret = env->mxccregs[7] >> 32;
T0 = env->mxccregs[7];
} else
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
break;