More ASIs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -337,6 +337,10 @@ void helper_ld_asi(int asi, int size, int sign)
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DPRINTF_MMU("mmu_read: reg[%d] = 0x%08x\n", reg, ret);
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}
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break;
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case 5: // Turbosparc ITLB Diagnostic
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case 6: // Turbosparc DTLB Diagnostic
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case 7: // Turbosparc IOTLB Diagnostic
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break;
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case 9: /* Supervisor code access */
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switch(size) {
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case 1:
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@ -441,9 +445,13 @@ void helper_ld_asi(int asi, int size, int sign)
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break;
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}
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break;
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case 0x30: // Turbosparc secondary cache diagnostic
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case 0x31: // Turbosparc RAM snoop
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case 0x32: // Turbosparc page table descriptor diagnostic
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case 0x39: /* data cache diagnostic register */
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ret = 0;
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break;
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case 8: /* User code access, XXX */
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default:
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do_unassigned_access(T0, 0, 0, asi);
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ret = 0;
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@ -621,6 +629,10 @@ void helper_st_asi(int asi, int size)
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#endif
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}
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break;
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case 5: // Turbosparc ITLB Diagnostic
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case 6: // Turbosparc DTLB Diagnostic
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case 7: // Turbosparc IOTLB Diagnostic
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break;
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case 0xa: /* User data access */
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switch(size) {
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case 1:
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@ -713,8 +725,7 @@ void helper_st_asi(int asi, int size)
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}
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}
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break;
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case 0x2e: /* MMU passthrough, 0xexxxxxxxx */
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case 0x2f: /* MMU passthrough, 0xfxxxxxxxx */
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case 0x21 ... 0x2f: /* MMU passthrough, 0x100000000 to 0xfffffffff */
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{
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switch(size) {
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case 1:
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@ -738,16 +749,17 @@ void helper_st_asi(int asi, int size)
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}
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}
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break;
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case 0x30: /* store buffer tags */
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case 0x31: /* store buffer data or Ross RT620 I-cache flush */
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case 0x32: /* store buffer control */
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case 0x30: // store buffer tags or Turbosparc secondary cache diagnostic
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case 0x31: // store buffer data, Ross RT620 I-cache flush or
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// Turbosparc snoop RAM
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case 0x32: // store buffer control or Turbosparc page table descriptor diagnostic
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case 0x36: /* I-cache flash clear */
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case 0x37: /* D-cache flash clear */
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case 0x38: /* breakpoint diagnostics */
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case 0x4c: /* breakpoint action */
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break;
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case 8: /* User code access, XXX */
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case 9: /* Supervisor code access, XXX */
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case 0x21 ... 0x2d: /* MMU passthrough, unassigned */
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default:
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do_unassigned_access(T0, 1, 0, asi);
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break;
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