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Author SHA1 Message Date
ths
9f77c1cdcf Remove bogus instruction decode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3433 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:52:07 +00:00
ths
6ad3872210 Force proper sign extension for mfc0/mfhc0 on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3432 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:10:32 +00:00
ths
60445285a8 Fix writable length of the index register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3431 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:58:21 +00:00
ths
7d307e9edc Enforce proper sign extension for lwl/lwr on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3430 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:23:43 +00:00
ths
67fc07d3fb Fix overflow when multiplying two large positive numbers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3429 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:22:54 +00:00
ths
9278480e8f Fix CLO calculation for MIPS64. And a small code cleanup. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3428 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:22:03 +00:00
ths
7385ac0ba2 Use the standard ASE check for MIPS-3D and MT. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 17:04:27 +00:00
ths
d8a5950a62 Switch bc1any* instructions off if no MIPS-3D is implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3426 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 13:15:33 +00:00
ths
b46a8906b3 Support tap down script, by Wolfram Gloger. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3425 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-21 23:20:45 +00:00
j_mayer
fce62c4eb3 Bugfix: now PCI NICs really work on PowerPC PreP platform. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3424 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-21 15:53:01 +00:00
j_mayer
bd3e2c4e69 Allow use of PCI NICs on PowerPC PreP platform. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3423 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-21 12:29:36 +00:00
j_mayer
615e2dba4f New status file for Alpha emulation target. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3422 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-21 09:46:04 +00:00
ths
a47b8d38b7 "QEMU keyboard issue with Gujin-2.2", by Etienne Lorrain. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3421 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 20:48:09 +00:00
ths
e9c0822655 Physical hard disk drive for win32, by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3420 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 20:40:05 +00:00
ths
3f6ffb6ac9 Enable ACPI interrupts, by Igor Lvovsky. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3419 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 20:36:52 +00:00
ths
0da46a6e2e Syscall target errno fixes, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3418 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 20:23:07 +00:00
ths
1931e26054 Check the Galilleo config register instead of hardcoding the endianness. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3417 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 19:47:14 +00:00
ths
647de6ca24 Handle IBE on MIPS properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 19:45:44 +00:00
ths
932a79df5d Don't install tools if $(TOOLS) is empty, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3415 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 18:29:34 +00:00
j_mayer
5a9b7d36a0 Avoid PreP target kernel freeze waiting for IRQs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3414 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 09:13:55 +00:00
blueswir1
a785e42e06 Update Sparc parts in documentation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3413 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 08:09:05 +00:00
blueswir1
20b749f607 Avoid gcc warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3412 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 07:09:08 +00:00
blueswir1
1e64e78d0c Fix compiling Sparc64 on PPC host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3411 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 07:07:47 +00:00
j_mayer
f85e9a6870 Use TARGET_ABI_DIR feature to unify PowerPC and PowerPC 64 definitions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3410 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-18 20:51:49 +00:00
j_mayer
e85e7c6ea4 Use the new TARGET_ABI32 feature to implement a ppc64abi32-linux-user target 
(PowerPC 64 running in 32 bits mode).
Use the new TARGET_ABI_DIR feature to implement a ppcemb-linux-user target
  (PowerPC 32 with 64 bits GPRs and vector extensions).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3409 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-18 19:59:49 +00:00
ths
b533415989 Only map BIOS space when it was actually loaded. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3408 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-18 15:05:11 +00:00
ths
8279006411 Cast ELF datatypes properly to host 64bit types. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3407 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 23:07:31 +00:00
blueswir1
06c0b38830 Really update the image 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3406 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 17:42:21 +00:00
blueswir1
e909ec2f11 Use ldq and stq for 8 byte accesses (original patch by Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3405 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 17:37:13 +00:00
blueswir1
8f577d3d29 Enable all alignment checks 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3404 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 17:34:57 +00:00
blueswir1
dbe7fb91e1 Update Sparc32 OpenBIOS image to SVN revision 171. Changes: 
r170: Fix exception handling and printout
r171: Fix 8 byte alignment problems


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3403 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 17:34:17 +00:00
ths
c7890fc209 Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3402 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 13:43:58 +00:00
ths
f0fc6f8fbc Second half of mipssim support, plus documentation improvements. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3401 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 13:39:42 +00:00
ths
6bf5b4e8a8 MIPSsim pseudo machine emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3400 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 13:08:32 +00:00
blueswir1
94ced07534 Fix bug in Sparc32 sta op (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3399 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 20:27:00 +00:00
blueswir1
6f27aba62e Sparc64 hypervisor mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 17:07:21 +00:00
blueswir1
952a328ff5 SuperSparc MXCC support (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 16:29:21 +00:00
blueswir1
992f48a036 Support for 32 bit ABI on 64 bit targets (only enabled Sparc64) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3396 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 16:27:31 +00:00
j_mayer
b227a8e9aa Properly implement non-execute bit on PowerPC segments and PTEs. 
Fix page protection bits for PowerPC 64 MMU.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3395 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 10:21:20 +00:00
j_mayer
dbdd25065e Implement time-base start/stop helpers. 
Implement PowerPC 6xx time-base enable input pin.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3394 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 09:35:30 +00:00
j_mayer
d68f13063b Merge PowerPC 620 input bus definitions with standard PowerPC 6xx. 
Avoid hardcoding PowerPC interrupts definitions to ease updates.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3393 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 09:27:16 +00:00
j_mayer
a13d7523cb There is no need of a specific MMU model for PowerPC 601. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 09:14:08 +00:00
j_mayer
eacc324914 Implement PowerPC 64 SLB invalidation helpers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3391 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 09:06:19 +00:00
j_mayer
a01d8cadad Fix memory corruption reported by Julian Seward 
(still more bugs to fix in PreP emulation).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3390 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:52:44 +00:00
j_mayer
bb6f6792bf Allow Alpha target to use supervisor and executive mode micro-ops. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3389 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:50:17 +00:00
j_mayer
e63ecc6f68 Do not allow PowerPC CPU restart after entering checkstop mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3388 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:48:23 +00:00
j_mayer
22f8a8b31c Provision for PowerPC 64 with hypervisor mode support - not enabled for now. 
For consistency, group all PowerPC targets.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3387 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:38:29 +00:00
j_mayer
1e42b8f06d Generate micro-ops for PowerPC hypervisor mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3386 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:27:14 +00:00
j_mayer
b1806c9e67 Generate micro-ops for Alpha executive and supervisor modes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3385 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:18:12 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00