There is no need of a specific MMU model for PowerPC 601.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -88,8 +88,6 @@ enum {
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POWERPC_MMU_UNKNOWN = 0,
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/* Standard 32 bits PowerPC MMU */
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POWERPC_MMU_32B,
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/* PowerPC 601 MMU */
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POWERPC_MMU_601,
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/* PowerPC 6xx MMU with software TLB */
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POWERPC_MMU_SOFT_6xx,
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/* PowerPC 74xx MMU with software TLB */
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@ -1280,7 +1280,6 @@ static int check_physical (CPUState *env, mmu_ctx_t *ctx,
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case POWERPC_MMU_32B:
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case POWERPC_MMU_SOFT_6xx:
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case POWERPC_MMU_SOFT_74xx:
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case POWERPC_MMU_601:
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case POWERPC_MMU_SOFT_4xx:
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case POWERPC_MMU_REAL_4xx:
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case POWERPC_MMU_BOOKE:
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@ -1365,10 +1364,6 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
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ret = mmu40x_get_physical_address(env, ctx, eaddr,
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rw, access_type);
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break;
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case POWERPC_MMU_601:
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/* XXX: TODO */
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cpu_abort(env, "601 MMU model not implemented\n");
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return -1;
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case POWERPC_MMU_BOOKE:
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ret = mmubooke_get_physical_address(env, ctx, eaddr,
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rw, access_type);
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@ -1462,10 +1457,6 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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env->exception_index = POWERPC_EXCP_ISI;
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env->error_code = 0x40000000;
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break;
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case POWERPC_MMU_601:
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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return -1;
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case POWERPC_MMU_BOOKE:
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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@ -1562,10 +1553,6 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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else
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env->spr[SPR_DSISR] = 0x40000000;
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break;
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case POWERPC_MMU_601:
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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return -1;
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case POWERPC_MMU_BOOKE:
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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@ -1796,10 +1783,6 @@ void ppc_tlb_invalidate_all (CPUPPCState *env)
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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break;
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case POWERPC_MMU_601:
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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break;
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case POWERPC_MMU_32B:
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#if defined(TARGET_PPC64)
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case POWERPC_MMU_64B:
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@ -1839,10 +1822,6 @@ void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr)
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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break;
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case POWERPC_MMU_601:
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/* XXX: TODO */
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cpu_abort(env, "MMU model not implemented\n");
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break;
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case POWERPC_MMU_32B:
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/* tlbie invalidate TLBs for all segments */
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addr &= ~((target_ulong)-1 << 28);
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@ -3196,7 +3196,7 @@ static void init_proc_e500 (CPUPPCState *env)
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#define POWERPC_INSNS_601 (POWERPC_INSNS_6xx | PPC_CACHE_DCBZ | \
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PPC_SEGMENT | PPC_EXTERN | PPC_POWER_BR)
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#define POWERPC_MSRM_601 (0x000000000000FD70ULL)
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//#define POWERPC_MMU_601 (POWERPC_MMU_601)
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#define POWERPC_MMU_601 (POWERPC_MMU_32B)
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//#define POWERPC_EXCP_601 (POWERPC_EXCP_601)
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#define POWERPC_INPUT_601 (PPC_FLAGS_INPUT_6xx)
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#define POWERPC_BFDM_601 (bfd_mach_ppc_601)
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@ -6232,9 +6232,6 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
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case POWERPC_MMU_32B:
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mmu_model = "PowerPC 32";
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break;
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case POWERPC_MMU_601:
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mmu_model = "PowerPC 601";
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break;
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case POWERPC_MMU_SOFT_6xx:
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mmu_model = "PowerPC 6xx/7xx with software driven TLBs";
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break;
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