Commit Graph

676 Commits

Author SHA1 Message Date
Richard Henderson
6cb675b0f8 target-sparc: Use movcond in mulscc
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
a2ea4aa989 target-sparc: Move taddcctv and tsubcctv out of line
The branches around the exception are maintaining an otherwise
unnecessary use of local temps for the cpu destination.

Note that gen_op_t{add,sub}_cc were identical to gen_op_{add,sub}_cc.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
bd49ed41eb target-sparc: Tidy Tcc
Share more code between unconditional and conditional paths.

Move the computation of the trap number into the conditional BB;
avoid using temporaries that have gone out of scope (cpu_tmp32)
or rely on local temps (cpu_dst).

Fully fold the exception number when the trap number is %g0+imm.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
c28ae41ecd target-sparc: Move sdivx and udivx out of line
The branches around the exception are maintaining an otherwise
unnecessary use of local temps for the cpu destination.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
61316742e2 target-sparc: Use movcond in gen_generic_branch
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
c33f80f52a target-sparc: Use DisasCompare and movcond in MOVR
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
f52879b441 target-sparc: Use DisasCompare and movcond in MOVCC
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
7e480893cc target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCC
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
3a49e7598b target-sparc: Use DisasCompare in Tcc
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
416fcaea1e target-sparc: Introduce DisasCompare and functions to generate it
For the moment gen_cond et al retain their existing interface,
using setcond to turn a (potential) comparison back into a boolean.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
2e655fe768 target-sparc: Tidy gen_generic_branch interface
The arguments passed are always the same.
Pass down just DisasContext instead.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
934da7ee08 target-sparc: Tidy save_npc interface
Use the cpu_cond global register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
13a6dd0043 target-sparc: Tidy gen_mov_pc_npc interface
Use the cpu_cond global register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
66442b07ae target-sparc: Tidy save_state interface
Use the cpu_cond global register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
5b12f1e8a1 target-sparc: Tidy gen_trap_ifnofpu interface
We always pass cpu_cond to the cond parameter.  Use that global
register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
dee8913cbf target-sparc: Tidy flush_cond interface
We always pass cpu_cond to the cond parameter.  Use that global
register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
d4a288ef9c target-sparc: Tidy do_branch interfaces
We always pass cpu_cond to the r_cond parameter.  Use that global
register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:29 +00:00
Richard Henderson
b884fc5eca target-sparc: Make CPU_LOG_INT useful by default
No need for ifdefs when the log mask does just as well.
No need to print pc/npc when we're dumping the whole cpu state.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:29 +00:00
Richard Henderson
76a23ca099 target-sparc: Tidy cpu_dump_state
We don't really need to be told that %g are general register, etc.
Issue a trailing newline to separate blocks.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:29 +00:00
Jim Meyering
bfad67399b sparc: use g_strdup in place of unchecked strdup
This avoids a NULL-deref upon strdup failure.
Also update matching free to g_free.

Signed-off-by: Jim Meyering <meyering@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-05 07:58:36 -05:00
Richard Henderson
fdefe51c28 Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
For all targets that currently call tcg_gen_debug_insn_start,
add CPU_LOG_TB_OP_OPT to the condition that gates it.

This is useful for comparing optimization dumps, when the
pre-optimization dump is merely noise.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27 21:38:50 +02:00
Blue Swirl
89c33337fd Remove unused CONFIG_TCG_PASS_AREG0 and dead code
Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets,
remove dead code and support for !CONFIG_TCG_PASS_AREG0 case.

Remove dyngen-exec.h and all references to it. Although included by
hw/spapr_hcall.c, it does not seem to use it.

Remove unused HELPER_CFLAGS.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-09-15 17:51:14 +00:00
Aurelien Jarno
5acfc8320f target-sparc: fix fcmp{s,d,q} instructions wrt exception
fcmp{s,d,q} instructions are supposed to ignore quiet NaN (contrary to
the fcmpe{s,d,q} instructions), but the current code is wrongly setting
the NV exception in that case. Moreover the current code is duplicated:
first the arguments are checked for NaN to generate an exception, and
later in case the comparison is unordered (which can only happens if one
of the argument is a NaN), the same check is done to generate an
exception.

Fix that by calling clear_float_exceptions() followed by
check_ieee_exceptions() as for the other floating point instructions.
Use the _compare_quiet functions for fcmp{s,d,q} and the _compare ones
for fcmpe{s,d,q}. Simplify the flag setting by not clearing a flag that
is set the line just below.

This fix allows the math glibc testsuite to pass.

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-09-08 09:03:45 +00:00
Blue Swirl
71547a3bf3 qemu-log: use LOG_UNIMP for some target CPU cases
Use LOG_UNIMP for some target CPU cases.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Alexander Graf <agraf@suse.de>
2012-06-21 18:45:22 +00:00
Paolo Bonzini
fbe37ef3e1 build: move other target-*/ objects to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:11 +02:00
Paolo Bonzini
9cdc8df314 build: move libobj-y variable to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:19:23 +02:00
Paolo Bonzini
5e8861a036 build: move obj-TARGET-y variables to nested Makefile.objs
Also drop duplicate occurrence of device-hotplug.o.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:17:36 +02:00
Andreas Färber
b7e516ce04 Kill off cpu_state_reset()
In commit 1bba0dc932 cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.

All callers have been updated except for one in target-mips, so drop all
implementations except for the one in target-mips and move the
declaration there until MIPSCPU reset can be fully QOM'ified.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris)
Acked-by: Alexander Graf <agraf@suse.de> (for ppc)
Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04 23:00:45 +02:00
Andreas Färber
e59be77a5b target-sparc: Let cpu_sparc_init() return SPARCCPU
Make include paths for cpu-qom.h consistent, so that SPARCCPU can be
used in cpu.h.

Turn cpu_init macro into a static inline function returning
CPUSPARCState for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04 23:00:45 +02:00
Artyom Tarasenko
00b2ace509 fix block loads broken in commit 30038fd818
Fix UltraSPARC/JPS1/UA2007 VIS block load instructions broken in
30038fd818.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
[blauwirbel@gmail.com: trimmed unwanted part of patch]
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-12 09:48:05 +00:00
Artyom Tarasenko
22036a49dd Implement address masking for SPARC v9 CPUs
According to UltraSPARC - IIi User's manual:

14.1.11 Address Masking (Impdep #125)
When PSTATE.AM=1, the CALL, JMPL, and RDPC instructions and all traps
transmit zero in the high-order 32-bits of the PC to their specified
destination registers.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-12 09:46:00 +00:00
Blue Swirl
90449c3887 sparc: fix qtest
Initialize TCG only when enabled.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-19 18:52:48 +00:00
Blue Swirl
2050396801 Use uintptr_t for various op related functions
Use uintptr_t instead of void * or unsigned long in
several op related functions, env->mem_io_pc and
GETPC() macro.

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14 14:23:37 +00:00
Andreas Färber
ab7ab3d74c target-sparc: QOM'ify CPU
Embed CPUSPARCState as first member of SPARCCPU.
Drop cpu_sparc_close() in favor of object_delete() and a finalizer.
Let cpu_state_reset() call cpu_reset().

Make TYPE_SPARC_CPU non-abstract for now.
Distinguish between "sparc-cpu" and "sparc64-cpu".

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-07 08:25:21 +00:00
Andreas Färber
88ca012a1f target-sparc: Rename cpu_init.c
Align QOM'ified targets, with a view to simplify Makefile.target.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-07 08:24:44 +00:00
Blue Swirl
1658dd3240 sparc: pass page aligned addresses to tlb_set_page
Mask incoming page address early so that resolved addresses
are page aligned. Remove further address masking.

Tested-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-27 19:46:42 +00:00
Stefan Weil
bc09845431 target-sparc: Add compiler attribute to some functions which don't return
helper_raise_exception does not return, nor does do_unaligned_access.

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24 13:02:56 +00:00
Blue Swirl
0184e266cb Sparc: avoid AREG0 wrappers for memory access helpers
Adjust generation of load and store templates so that the functions
take a parameter for CPUState instead of relying on global env.

Remove wrappers. Move remaining memory helpers to ldst_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18 12:22:02 +00:00
Blue Swirl
fe8d8f0f1c Sparc: avoid AREG0 for memory access helpers
Make memory access helpers take a parameter for CPUState instead
of relying on global env. Introduce wrappers for load and store ops.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18 12:22:00 +00:00
Blue Swirl
361dea401f sparc64: implement PCI and ISA irqs
Generate correct trap for external interrupts. Map PCI and ISA IRQs to
RIC/UltraSPARC-IIi interrupt vectors.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17 16:30:06 +00:00
Blue Swirl
89aaf60ded sparc: reset CPU state on reset
Not strictly accurate for Sparc64 but avoid confusing Valgrind.

Reported-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17 16:29:57 +00:00
Andreas Färber
9349b4f9fd Rename CPUState -> CPUArchState
Scripted conversion:
  for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
    sed -i "s/CPUState/CPUArchState/g" $file
  done

All occurrences of CPUArchState are expected to be replaced by QOM CPUState,
once all targets are QOM'ified and common fields have been extracted.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:27 +01:00
Andreas Färber
c5f9864e89 target-sparc: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPUSPARCState/g" target-sparc/*.[hc]
  sed -i "s/#define CPUSPARCState/#define CPUState/" target-sparc/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Andreas Färber
cb15982158 target-sparc: Typedef struct CPUSPARCState early
Will be needed for qemu_irq_ack callback.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:24 +01:00
Andreas Färber
1bba0dc932 Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:24 +01:00
Andreas Färber
520c0d8d27 target-sparc: Fix mixup of uint64 and uint64_t
Commit 793a137a41 (target-sparc:
Implement BMASK/BSHUFFLE.) introduced a stray usage of softfloat uint64
type.

Use uint64_t instead.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-22 09:55:35 +00:00
Avi Kivity
cc4aa8307c sparc: avoid cpu_get_physical_page_desc()
This reaches into the innards of the memory core, which are being
changed.  Switch to a memory API version.

Signed-off-by: Avi Kivity <avi@redhat.com>
2012-01-03 19:19:28 +02:00
Dong Xu Wang
4abf79a428 fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Alexander Graf <agraf@suse.de>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-02 10:50:57 +00:00
Fabien Chouteau
96d922a654 Improve "ta 0" shutdown
This patch replace the previous implementation with this simplified and
more complete version (no shutdown when psret == 1).

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-11-19 11:22:57 +00:00
Richard Henderson
50c796f9d8 target-sparc: Implement FALIGNDATA inline.
This is a relatively simple sequence of shifts.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 14:00:19 -07:00
Richard Henderson
793a137a41 target-sparc: Implement BMASK/BSHUFFLE.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 14:00:19 -07:00
Richard Henderson
add545ab11 target-sparc: Implement ALIGNADDR* inline.
While ALIGNADDR was implemented out-of-line, ALIGNADDRL was not
implemeneted at all.  However, this is a very simple operation
so we're better off doing this inline.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 14:00:19 -07:00
Richard Henderson
6c07355325 target-sparc: Implement EDGE* instructions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 14:00:19 -07:00
Richard Henderson
2dedf31497 target-sparc: Implement fpack{16,32,fix}.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 14:00:17 -07:00
Richard Henderson
f888300b81 target-sparc: Implement PDIST.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:58:48 -07:00
Richard Henderson
445167723d target-sparc: Do exceptions management fully inside the helpers.
This reduces the size of the individual translation blocks, since
we only emit a single call for each FOP rather than three.  In
addition, clear_float_exceptions expands inline to a single byte store.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:57:06 -07:00
Richard Henderson
30038fd818 target-sparc: Change fpr representation to doubles.
This allows a more efficient representation for 64-bit hosts.
It should be about the same for 32-bit hosts, as we can still
access the individual pieces of the double.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:55:26 -07:00
Richard Henderson
45c7b743cd target-sparc: Undo cpu_fpr rename.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:55:26 -07:00
Richard Henderson
ac11f7767f target-sparc: Extract float128 move to a function.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:55:26 -07:00
Richard Henderson
61f17f6eba target-sparc: Extract common code for floating-point operations.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:55:24 -07:00
Richard Henderson
f027c3b192 target-sparc: Make FPU/VIS helpers const when possible.
This also removes the unused ENV parameter from these helpers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:50:45 -07:00
Richard Henderson
03fb8cfc63 target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:50:45 -07:00
Richard Henderson
96eda02412 target-sparc: Add accessors for double-precision fpr access.
Begin using i64 quantities to manipulate double-precision values.
On a 64-bit host this will, for the moment, generate less efficient
code; on a 32-bit host code quality should be largely unchanged.
Code quality for 64-bit will be adjusted with a subsequent patch.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:50:45 -07:00
Richard Henderson
141ae5c13f target-sparc: Mark fprs dirty in store accessor.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:50:45 -07:00
Richard Henderson
208ae65722 target-sparc: Add accessors for single-precision fpr access.
Load, store, and "create destination".  This version attempts to
change the behaviour of the translator as little as possible.  We
previously used cpu_tmp32 as the temporary destination, and we
continue to use that.  This will eventually allow a change in
representation of the fprs.

Change the name of the cpu_fpr array to make certain that all
instances are converted.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:50:42 -07:00
Blue Swirl
fafd8bceb5 Sparc: split load and store op helpers
Move load and store op helpers top ldst_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:19:20 +00:00
Blue Swirl
870be6ad57 Sparc: convert win_helper to trace framework
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:19:18 +00:00
Blue Swirl
11e66bca8a Sparc: convert interrupt helpers to trace framework
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:58 +00:00
Blue Swirl
ec0ceb1759 Sparc: convert mmu_helper to trace framework
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:57 +00:00
Blue Swirl
163fa5ca51 Sparc: split MMU helpers
Move MMU helpers to mmu_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:55 +00:00
Blue Swirl
b7da25f003 Sparc: fix coding style in helper.c
Before the next patch, fix coding style of the areas affected.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:53 +00:00
Blue Swirl
7a5e4488cd Sparc: avoid AREG0 for division op helpers
Make [su]div{,cc} helpers take a parameter for CPUState instead
of relying on global env. Move the functions to helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:52 +00:00
Blue Swirl
7922703623 Sparc: avoid AREG0 for softint op helpers and Leon cache control
Make softint op helpers and Leon cache irq manager take a parameter
for CPUState instead of relying on global env. Move the functions
to int{32,64}_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:09 +00:00
Blue Swirl
063c367558 Sparc: avoid AREG0 for CWP and PSTATE helpers
Make CWP and PSTATE helpers take a parameter for CPUState instead
of relying on global env. Remove wrapper functions.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:18:04 +00:00
Stefan Weil
d300854b1c target-sparc: Fix use of g_new0 / g_free
g_malloc0 needs g_free instead of free.
While fixing this, I also replaced g_malloc0 by g_new0
as was suggested by Stuart Brady.

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-25 19:30:33 +00:00
Stefan Weil
f37e2a6bb3 target-sparc: Fix order of function parameters
The MinGW-w64 gcc complains about wrong parameters for
gen_helper_fpadd16_s and three other functions.

gen_helper_fpadd16_s is declared like this (hidden in lots of macros):

static inline void
 gen_helper_fpadd16s(TCGv_i32 retval, TCGv_ptr arg1,
                     TCGv_i32 arg2, TCGv_i32 arg3);

So it looks like cpu_env should be the 2nd parameter.

Please review this patch as I have no environment to test it
(maybe the 1st parameter should be cpu_dst?).

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-25 19:30:00 +00:00
Blue Swirl
070af38404 Sparc: split CWP and PSTATE op helpers
Move CWP and PSTATE op helpers to win_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:10:18 +00:00
Blue Swirl
2ffd9176b1 Sparc: avoid AREG0 for lazy condition code helpers
Make lazy condition code helpers take a parameter for CPUState instead
of relying on global env.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:09:37 +00:00
Blue Swirl
cffc581873 Sparc: split lazy condition code handling op helpers
Move lazy condition code handling op helpers to cc_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:09:28 +00:00
Blue Swirl
2e2f4ade86 Sparc: avoid AREG0 for float and VIS ops
Make floating point and VIS ops take a parameter for CPUState instead
of relying on global env.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:09:13 +00:00
Blue Swirl
1bccec25e1 Sparc: split FPU and VIS op helpers
Move FPU op helpers to fop_helper.c. Move VIS op helpers to vis_helper.c,
compile it only for Sparc64.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:08:56 +00:00
Blue Swirl
99ca02195c Sparc: fix coding style
Before the next patches, fix coding style of the areas affected.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:08:45 +00:00
Blue Swirl
bc2653195a Sparc: avoid AREG0 for raise_exception and helper_debug
Make raise_exception() and helper_debug() take a parameter for
CPUState instead of relying on global env. Move the functions
to helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:08:22 +00:00
Blue Swirl
2336c1f197 Sparc: move trivial functions from op_helper.c
These functions don't need access to CPUState or already pass it,
so relocating them from op_helper.c to helper.c and int64_helper.c
is trivial.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:08:10 +00:00
Blue Swirl
ab3b491f21 Sparc: split helper.c
Move CPU init to cpu_init.c and interrupt handling to int32_helper.c
for Sparc32 and int64_helper.c for Sparc64.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:07:52 +00:00
Blue Swirl
c65f6fd4bc Sparc: fix coding style
Before the next patch, fix coding style of the areas affected.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23 15:05:30 +00:00
Blue Swirl
bccd9ec5f0 softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture local
cpu_single_env hacks.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01 09:31:26 +00:00
Fabien Chouteau
44520db10b Gdbstub: Fix back-trace on SPARC32
Gdb expects all registers windows to be flushed in ram, which is not the case
in Qemu. Therefore the back-trace generation doesn't work. This patch adds a
function to handle reads (and only read) in stack frames as if windows were
flushed.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10 18:12:35 +00:00
Blue Swirl
de18f87eb1 Sparc64: remove useless variable
Remove a useless variable, spotted by clang analyzer:
/src/qemu/target-sparc/op_helper.c:3904:18: warning: unused variable 'tmp' [-Wunused-variable]
    target_ulong tmp = val;
The error message is actually incorrect since the variable is used.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10 14:56:01 +00:00
Anthony Liguori
7267c0947d Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-20 23:01:08 -05:00
Blue Swirl
97b348e7d2 Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-07 09:32:01 +00:00
Artyom Tarasenko
548f66db33 Fix handling of conditional branches in delay slot of a conditional branch
Check whether dc->npc is dynamic before using its value for branch.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-06 15:08:31 +00:00
Blue Swirl
67494323f2 Sparc: fix non-faulting unassigned memory accesses
Commit b14ef7c9ab
introduced cpu_unassigned_access() function. On Sparc,
the function does not restore AREG0 used for global CPUState
on function exit, causing bugs with non-faulting unassigned
memory accesses. Alpha, Microblaze and MIPS are not affected.

Fix by restoring AREG0 on exit. Remove excess saving by
do_unassigned_access() functions.

Also ignore unassigned accesses outside of CPU context.

Reported-by: Bob Breuer <breuerr@mc.net>
Tested-by: Bob Breuer <breuerr@mc.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-01 21:26:03 +00:00
Blue Swirl
3e4571724f exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h to
target-*/op_helper.c. Move also various other stuff only used in
op_helper.c there.

Define global env in dyngen-exec.h.

For i386, move wrappers for segment and FPU helpers from user-exec.c
to op_helper.c. Implement raise_exception_err_env() to handle dynamic
CPUState. Move the function declarations to cpu.h since they can be
used outside of op_helper.c context.

LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and
env_to_regs().

ARM: make raise_exception() static.

Convert
#include "exec.h"
to
#include "cpu.h"
#include "dyngen-exec.h"
and remove now unused target-*/exec.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30 09:41:14 +00:00
Tsuneo Saito
638737ad03 SPARC64: implement %fprs dirty bits
Implement %fprs.DU/DL bits.
The FPU sets %fprs.DL and %fprs.DU when values are assigned to %f0-31
and %f32-63 respectively.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30 08:26:45 +00:00
Tsuneo Saito
ccb57e0ea7 SPARC64: fix fnor* and fnand*
Fix the problem that result values are not assigned to the destination
registers.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30 08:26:45 +00:00
Stefan Weil
3b8b030a28 target-sparc: Fix compiler errors (format strings)
This change is needed because commit 06e12b65
now uses an unsigned long long value
(uint64_t && unsigned long long => unsigned long long).

Cc: Tsuneo Saito <tsnsaito@gmail.com>
Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-22 15:31:59 +00:00
Tsuneo Saito
d1afc48b7c SPARC64: implement addtional MMU faults related to nonfaulting load
This patch implements MMU faults caused by TTE.NFO and TTE.E:
- access other than nonfaulting load to a page marked NFO should
  raise data_access_exception
- nonfaulting load to a page marked with E bit should raise
  data_access_exception

To distinguish nonfaulting loads, this patch extends (abuses?) the rw
argument of get_physical_address_data().  rw is set to 4 on nonfaulting
loads.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-21 20:02:22 +00:00
Tsuneo Saito
b7785d2072 SPARC64: implement MMU miss traps on nonfaulting loads
Nonfaulting loads should raise fast_data_access_MMU_miss traps as
normal loads do.  It is up to the guest OS kernel that detect MMU misses
on nonfaulting load instructions and make them complete without signaling.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-21 20:01:56 +00:00
Tsuneo Saito
103dcbe581 SPARC64: fix fault status overwritten on nonfaulting load
cpu_get_phys_page_nofault() calls get_physical_address() twice,
that results in overwriting the fault status in the SFSR.
We need this change in order for nonfaulting loads to raising MMU faults
as normal loads do.
Also removed the call to cpu_get_physical_page_desc() since we are
going to modify nonfaulting loads raising MMU faults.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-21 20:01:48 +00:00