Commit Graph

76 Commits

Author SHA1 Message Date
Andreas Färber
8d725fac63 softfloat: Prepend QEMU-style header with derivation notice
The SoftFloat license requires "prominent notice that the work
is derivative". Having added features like improved 16-bit support
for arm already, add such a notice to the sources.

softfloat-native.[ch] are not under the SoftFloat license
and thus are not changed.

Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-21 21:46:05 +01:00
Peter Maydell
d5138cf4a8 softfloat: Fix compilation failures with USE_SOFTFLOAT_STRUCT_TYPES
Make softfloat compile with USE_SOFTFLOAT_STRUCT_TYPES defined, by
adding and using new macros const_float16(), const_float32() and
const_float64() so you can use array initializers in an array of
float16/float32/float64 whether the types are bare or wrapped in the
structs.

[aurelien@aurel32.net: do the same for float16]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 20:16:43 +01:00
Peter Maydell
f591e1bedf softfloat: Correctly handle NaNs in float16_to_float32()
Correctly handle NaNs in float16_to_float32(), by defining and
using a float16ToCommonNaN() function, as we do with the other formats.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:29 +01:00
Peter Maydell
600e30d2b2 softfloat: Fix single-to-half precision float conversions
Fix various bugs in the single-to-half-precision conversion code:
 * input NaNs not correctly converted in IEEE mode
   (fixed by defining and using a commonNaNToFloat16())
 * wrong values returned when converting NaN/Inf into non-IEEE
   half precision value
 * wrong values returned for conversion of values which are
   on the boundary between denormal and zero for the half
   precision format
 * zeroes not correctly identified
 * excessively large results in non-IEEE mode should
   generate InvalidOp, not Overflow

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:21 +01:00
Christophe Lyon
bcd4d9afd4 softfloat: Honour default_nan_mode for float-to-float conversions
Honour the default_nan_mode flag when doing conversions between
different floating point formats, as well as when returning a NaN from
a two-operand floating point function. This corrects the behaviour
of float<->double conversions on both ARM and SH4.

Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:19 +01:00
Peter Maydell
bb4d4bb376 softfloat: Add float16 type and float16 NaN handling functions
Add a float16 type to softfloat, rather than using bits16 directly.
Also add the missing functions float16_is_quiet_nan(),
float16_is_signaling_nan() and float16_maybe_silence_nan(),
which are needed for the float16 conversion routines.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:09 +01:00
Peter Maydell
37d18660bb softfloat: Implement flushing input denormals to zero
Add support to softfloat for flushing input denormal float32 and float64
to zero. softfloat's existing 'flush_to_zero' flag only flushes denormals
to zero on output. Some CPUs need input denormals to be flushed before
processing as well. Implement this, using a new status flag to enable it
and a new exception status bit to indicate when it has happened. Existing
CPUs should be unaffected as there is no behaviour change unless the
mode is enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:59 +01:00
Peter Maydell
cbcef455a2 softfloat: Add float/double to 16 bit integer conversion functions
The ARM architecture needs float/double to 16 bit integer conversions.
(The 32 bit versions aren't sufficient because of the requirement
to saturate at 16 bit MAXINT/MININT and to get the exception bits right.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
2010-12-07 15:37:34 +00:00
Aurelien Jarno
8229c9913a softfloat: add float32_exp2()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-13 18:18:23 +02:00
Blue Swirl
ed086f3dde softfloat: remove dead assignments, spotted by clang
Value stored to 'bSign' is never read.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-07 13:49:58 +00:00
Paul Brook
600114988c ARM FP16 support
Implement the ARM VFP half precision floating point extensions.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-19 16:45:20 +00:00
aurel32
374dfc33e2 soft-float: add float32_log2() and float64_log2()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6518 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 13:42:47 +00:00
pbrook
fe76d97653 Implement flush-to-zero mode (denormal results are replaced with zero).
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6107 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 14:33:59 +00:00
pbrook
69397542d6 Correctly normalize values and handle zero inputs to scalbn functions.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6102 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 12:59:28 +00:00
blueswir1
b55266b5a2 Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 08:07:15 +00:00
blueswir1
1f58732916 128-bit float support for user mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 18:40:20 +00:00
blueswir1
cd8a25337e Fix more typos in softloat code (Eduardo Felipe)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3716 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21 18:57:44 +00:00
pbrook
a1b91bb406 Fix typo in softfloat code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3714 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21 15:32:12 +00:00
pbrook
f090c9d4ad Add strict checking mode for softfp code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18 14:33:24 +00:00
pbrook
9ee6e8bb85 ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 00:04:49 +00:00
j_mayer
3430b0be36 Ooops... Typo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2520 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-20 22:25:37 +00:00
j_mayer
75d62a5856 Add missing softfloat helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2518 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-20 22:10:42 +00:00
bellard
750afe93fd avoid using char when it is not necessary
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2204 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-28 19:27:11 +00:00
pbrook
e6e5906b6e ColdFire target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-22 00:18:54 +00:00
bellard
1d6bda3561 added abs, chs and compare functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1338 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 18:52:29 +00:00
bellard
158142c2c2 soft float support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1332 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 16:54:06 +00:00