Commit Graph

22305 Commits

Author SHA1 Message Date
Peter Maydell
07e10e5de1 tcg: Remove TCG_TARGET_HAS_GUEST_BASE define
GUEST_BASE support is now supported by all TCG backends, and is
now mandatory. Drop the now-pointless TCG_TARGET_HAS_GUEST_BASE
define (set by every backend) and the error if it is unset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 14:27:05 +03:00
Peter Maydell
30163d8995 configure: Remove unnecessary host_guest_base code
All TCG hosts now support guest-base functionality, so we can
remove the setting of host_guest_base to 'yes' in every arm
of the case "$cpu" statement, and simply set guest_base to
default to 'yes'.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 14:26:29 +03:00
Peter Maydell
885c1d10b8 linux-user: If loading fails, print error as string, not number
If the attempt to load the guest executable fails, print the
error message as a string, not a number. This requires us to
fix a couple of places in loader_exec() where we were returning
-1 instead of a valid negative errno.

The change allows us to drop the "Unknown binary format" message
because the strerror-enhanced message is now a more self-explanatory
"Error while loading $guest-binary: Exec format error".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 14:25:56 +03:00
Richard Henderson
a05c640915 linux-user: Fix siginfo handling
Compare signal numbers in the proper domain.
Convert all of the fields for SIGIO and SIGCHLD.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 14:01:49 +03:00
Richard Henderson
b7fb231013 alpha-linux-user: Fix sigaltstack structure definition
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 14:01:04 +03:00
Richard Henderson
3d21d29c32 linux-user: Implement gethostname
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 13:59:25 +03:00
Richard Henderson
f287b2c2d4 linux-user: Perform more checks on iovec lists
Validate count between 0 and IOV_MAX.  Limit total length of
operation in the same way the kernel does.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 13:59:09 +03:00
Alexander Graf
1bdd7c7ea8 linux-user: fix multi-threaded /proc/self/maps
When reading our faked /proc/self/maps from a secondary thread,
we get an invalid stack entry. This is because ts->stack_base is not
initialized in non-primary threads.

However, ts->info is, and the stack layout information we're looking
for is there too. So let's use that one instead!

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 13:58:13 +03:00
Alexander Graf
229d3376a3 linux-user: fix statfs
The statfs syscall should always memset(0) its full struct extent before
writing to it. Newer versions of the syscall use one of the reserved fields
for flags, which would otherwise get stale values from uncleaned memory.

This fixes libarchive for me, which got confused about the return value of
pathconf("/", _PC_REC_XFER_ALIGN) otherwise, as it some times gave old pointers
as return value.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12 13:58:13 +03:00
Peter Crosthwaite
b4ae3cfa57 ssi: Add slave autoconnect helper
Added helper function to automatically connect SPI slaves based on the QOM child
nodes of a device. A SSI master device can call this routine to automatically
hook-up all child nodes to its SPI bus.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
fcb5629d3e MAINTAINERS: Added maintainerships for SSI
Added maintainership for SSI, M25P80 and the Xilinx SPI controllers.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
559d489f13 xilinx_zynq: Added SPI controllers + flashes
Added the two SPI controllers to the zynq machine model. Attached two SPI flash
devices to each controller.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
94befa454d xilinx_spips: Xilinx Zynq SPI cntrlr device model
Added device model for the Xilinx Zynq SPI controller (SPIPS).

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
acd3b6be32 petalogix-ml605: added SPI controller with n25q128
Added SPI controller to the reference design, with two n25q128 spi-flashes
connected.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
929d1b52c4 xilinx_spi: Initial impl. of Xilinx SPI controller
Device model for xilinx XPS SPI controller (v2.0)

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
82a2499011 m25p80: Initial implementation of SPI flash device
Added device model for m25p80 style SPI flash family.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
a3578d4a51 hw: Added generic FIFO API.
Added a FIFO API that can be used to create and operate byte FIFOs.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
8120e7144b stellaris: Removed SSI mux
Removed the explicit SSI mux and wired the CS line directly up to the SSI
devices.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
1e5b31e6bd qdev: allow multiple qdev_init_gpio_in() calls
Allow multiple qdev_init_gpio_in() calls for the one device. The first call will
define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs to be handled
with different handlers. Needed when two levels of the QOM class heirachy both
define GPIO functionality, as a single GPIO handler with an index selecter is
not possible.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:32 +10:00
Peter A. G. Crosthwaite
74687e40b0 ssi: Added create_slave_no_init()
Slave creation function that can be used to create an SSI slave without
qdev_init() being called. This give machine models a chance to set properties.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:31 +10:00
Peter A. G. Crosthwaite
6653095331 ssi: Implemented CS behaviour
Added default CS behaviour for SSI slaves. SSI devices can set a property
to enable CS behaviour which will create a GPIO on the device which is the
CS. Tristating of the bus on SSI transfers is implemented.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:31 +10:00
Peter A. G. Crosthwaite
b4a76e84f4 ssi: Support for multiple attached devices
Removed assertion that only one device is attached to the SSI bus.

When multiple devices are attached, all slaves have their transfer function
called for transfers. Each device is responsible for knowing whether or not its
CS is active, and if not returning 0. The returned data is the logical or of
all responses from the (mulitple) devices.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10 11:13:31 +10:00
Blue Swirl
4bb26682f7 Merge branch 'master' of git.qemu.org:/pub/git/qemu
* 'master' of git.qemu.org:/pub/git/qemu:
  qemu-barrier: Fix compilation on i386 hosts
2012-10-07 18:42:18 +00:00
Aurelien Jarno
f1829782d6 qemu-barrier: Fix compilation on i386 hosts
Commit 1d31fca470 tried to fix bug
introduced by 610b823ef6 by including
qemu-common.h, which breaks the build further.

Include compiler.h instead, as suggested by Blue Swirl.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-07 20:07:11 +02:00
Richard Henderson
2a484ecf82 target-sparc: Optimize conditionals using SUBCC
Aka "normal" comparisons.  We now have the infrastructure to
pass back non-boolean results from gen_compare.  This will
automatically get used by both branches and conditional moves.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:34 +00:00
Richard Henderson
fe1755cbb2 target-sparc: Fall through from not-taken trap
Now that we've cleaned up global temporary allocation, we can
continue translating the fallthru path of a conditional trap.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:34 +00:00
Richard Henderson
b09b2fd30c target-sparc: Cleanup "global" temporary allocation
There are 6 temporaries that disas_sparc_insn relies on having been
allocated.  Now that they are no longer referenced across branches,
they need not be allocated as local temps.

Move the allocation/free of these temporaries to make it clear that
they are local to the translation of a single insn.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:34 +00:00
Richard Henderson
690995a615 target-sparc: Use movcond for FMOV*R
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:34 +00:00
Richard Henderson
6cb675b0f8 target-sparc: Use movcond in mulscc
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
a2ea4aa989 target-sparc: Move taddcctv and tsubcctv out of line
The branches around the exception are maintaining an otherwise
unnecessary use of local temps for the cpu destination.

Note that gen_op_t{add,sub}_cc were identical to gen_op_{add,sub}_cc.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
bd49ed41eb target-sparc: Tidy Tcc
Share more code between unconditional and conditional paths.

Move the computation of the trap number into the conditional BB;
avoid using temporaries that have gone out of scope (cpu_tmp32)
or rely on local temps (cpu_dst).

Fully fold the exception number when the trap number is %g0+imm.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
c28ae41ecd target-sparc: Move sdivx and udivx out of line
The branches around the exception are maintaining an otherwise
unnecessary use of local temps for the cpu destination.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:33 +00:00
Richard Henderson
61316742e2 target-sparc: Use movcond in gen_generic_branch
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
c33f80f52a target-sparc: Use DisasCompare and movcond in MOVR
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
f52879b441 target-sparc: Use DisasCompare and movcond in MOVCC
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
7e480893cc target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCC
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:32 +00:00
Richard Henderson
3a49e7598b target-sparc: Use DisasCompare in Tcc
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
416fcaea1e target-sparc: Introduce DisasCompare and functions to generate it
For the moment gen_cond et al retain their existing interface,
using setcond to turn a (potential) comparison back into a boolean.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
2e655fe768 target-sparc: Tidy gen_generic_branch interface
The arguments passed are always the same.
Pass down just DisasContext instead.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
934da7ee08 target-sparc: Tidy save_npc interface
Use the cpu_cond global register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:31 +00:00
Richard Henderson
13a6dd0043 target-sparc: Tidy gen_mov_pc_npc interface
Use the cpu_cond global register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
66442b07ae target-sparc: Tidy save_state interface
Use the cpu_cond global register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
5b12f1e8a1 target-sparc: Tidy gen_trap_ifnofpu interface
We always pass cpu_cond to the cond parameter.  Use that global
register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
dee8913cbf target-sparc: Tidy flush_cond interface
We always pass cpu_cond to the cond parameter.  Use that global
register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:30 +00:00
Richard Henderson
d4a288ef9c target-sparc: Tidy do_branch interfaces
We always pass cpu_cond to the r_cond parameter.  Use that global
register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:29 +00:00
Richard Henderson
b884fc5eca target-sparc: Make CPU_LOG_INT useful by default
No need for ifdefs when the log mask does just as well.
No need to print pc/npc when we're dumping the whole cpu state.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:29 +00:00
Richard Henderson
76a23ca099 target-sparc: Tidy cpu_dump_state
We don't really need to be told that %g are general register, etc.
Issue a trailing newline to separate blocks.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:39:29 +00:00
Stefan Weil
d838201111 tcg: Remove redundant pointer from TCGContext
The pointer entry 'temps' always refers to the array entry 'static_temps'.
Removing the pointer and renaming 'static_temps' to 'temps' reduces the
size of TCGContext (4 or 8 byte) and allows better code generation.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07 16:36:16 +00:00
Aurelien Jarno
046dbab95f Merge branch 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  target-arm: Drop unused DECODE_CPREG_CRN macro
  target-arm: use deposit instead of hardcoded version
  target-arm: mark a few integer helpers const and pure
  target-arm: convert sar, shl and shr helpers to TCG
  target-arm: convert add_cc and sub_cc helpers to TCG
  target-arm: use globals for CC flags
  target-arm: Reinstate display of VFP registers in cpu_dump_state
  cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
2012-10-06 18:54:46 +02:00
Aurelien Jarno
048d3612a5 Merge branch 'trivial-patches' of git://github.com/stefanha/qemu
* 'trivial-patches' of git://github.com/stefanha/qemu:
  versatilepb: Use symbolic indices for ARM PIC
  qdev: kill bogus comment
  qemu-barrier: Fix compiler version check for future gcc versions
  hw: Add missing 'static' attribute for QEMUMachine
  cleanup useless return sentence
  qemu-sockets: Fix compiler warning (regression for MinGW)
  vnc: Fix spelling (hellmen -> hellman) in comment
  slirp: Fix spelling in comment (enought -> enough, insure -> ensure)
  tcg/arm: Use tcg_out_mov_reg rather than inline equivalent code
  cpu: Add missing 'static' attribute to qemu_global_mutex
  configure: Support empty target list (--target-list=)
  hw: Fix return value check for bdrv_read, bdrv_write
2012-10-06 18:54:14 +02:00