target-sparc: Use movcond for FMOV*R
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -3051,44 +3051,30 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
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rs2 = GET_FIELD(insn, 27, 31);
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xop = GET_FIELD(insn, 18, 26);
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save_state(dc);
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#ifdef TARGET_SPARC64
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if ((xop & 0x11f) == 0x005) { // V9 fmovsr
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int l1;
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l1 = gen_new_label();
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cond = GET_FIELD_SP(insn, 14, 17);
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cpu_src1 = get_src1(insn, cpu_src1);
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tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
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0, l1);
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cpu_src1_32 = gen_load_fpr_F(dc, rs2);
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gen_store_fpr_F(dc, rd, cpu_src1_32);
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gen_set_label(l1);
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#ifdef TARGET_SPARC64
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#define FMOVR(sz) \
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do { \
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DisasCompare cmp; \
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cond = GET_FIELD_SP(insn, 14, 17); \
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cpu_src1 = get_src1(insn, cpu_src1); \
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gen_compare_reg(&cmp, cond, cpu_src1); \
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gen_fmov##sz(dc, &cmp, rd, rs2); \
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free_compare(&cmp); \
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} while (0)
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if ((xop & 0x11f) == 0x005) { /* V9 fmovsr */
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FMOVR(s);
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break;
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} else if ((xop & 0x11f) == 0x006) { // V9 fmovdr
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int l1;
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l1 = gen_new_label();
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cond = GET_FIELD_SP(insn, 14, 17);
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cpu_src1 = get_src1(insn, cpu_src1);
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tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
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0, l1);
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cpu_src1_64 = gen_load_fpr_D(dc, rs2);
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gen_store_fpr_D(dc, rd, cpu_src1_64);
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gen_set_label(l1);
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FMOVR(d);
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break;
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} else if ((xop & 0x11f) == 0x007) { // V9 fmovqr
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int l1;
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CHECK_FPU_FEATURE(dc, FLOAT128);
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l1 = gen_new_label();
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cond = GET_FIELD_SP(insn, 14, 17);
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cpu_src1 = get_src1(insn, cpu_src1);
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tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
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0, l1);
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gen_move_Q(rd, rs2);
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gen_set_label(l1);
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FMOVR(q);
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break;
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}
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#undef FMOVR
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#endif
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switch (xop) {
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#ifdef TARGET_SPARC64
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