2017-07-29 01:46:05 +03:00
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# See docs/devel/tracing.txt for syntax documentation.
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2016-06-16 11:39:59 +03:00
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2020-03-12 01:18:42 +03:00
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# allwinner-cpucfg.c
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allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
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allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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2020-03-12 01:18:43 +03:00
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2020-03-12 01:18:47 +03:00
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# allwinner-h3-dramc.c
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allwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror"
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allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
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allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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2020-03-12 01:18:43 +03:00
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# allwinner-sid.c
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allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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2020-03-12 01:18:42 +03:00
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2020-01-24 03:51:19 +03:00
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# avr_power.c
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avr_power_read(uint8_t value) "power_reduc read value:%u"
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avr_power_write(uint8_t value) "power_reduc write value:%u"
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2019-03-14 21:09:26 +03:00
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# eccmemctl.c
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 19:01:35 +03:00
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ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
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ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
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ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
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ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
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ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
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ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
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ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
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ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
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ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
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ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
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ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
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ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
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ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
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ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
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ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
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ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
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ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
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ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
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2016-06-16 11:39:59 +03:00
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2019-06-24 18:17:32 +03:00
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# empty_slot.c
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empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
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2019-03-14 21:09:26 +03:00
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# slavio_misc.c
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2016-06-16 11:39:59 +03:00
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slavio_misc_update_irq_raise(void) "Raise IRQ"
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slavio_misc_update_irq_lower(void) "Lower IRQ"
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slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 19:01:35 +03:00
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slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
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slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
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slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
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slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
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slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
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slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
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slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
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slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
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slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
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slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
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apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
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apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
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slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
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slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
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slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
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slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
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2016-06-16 11:39:59 +03:00
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2019-03-14 21:09:26 +03:00
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# milkymist-hpdmc.c
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 19:01:35 +03:00
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milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
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milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
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2016-06-16 11:39:59 +03:00
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2019-03-14 21:09:26 +03:00
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# milkymist-pfpu.c
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 19:01:35 +03:00
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milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
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2016-06-16 11:39:59 +03:00
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milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
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2016-06-27 17:37:33 +03:00
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2019-03-14 21:09:26 +03:00
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# aspeed_scu.c
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2016-06-27 17:37:33 +03:00
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aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
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2017-07-17 15:36:08 +03:00
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2019-03-14 21:09:29 +03:00
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# mps2-scc.c
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2017-07-17 15:36:08 +03:00
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mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_scc_reset(void) "MPS2 SCC: reset"
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mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
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mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
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2017-09-20 23:17:34 +03:00
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2019-03-14 21:09:29 +03:00
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# mps2-fpgaio.c
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2018-03-02 13:45:39 +03:00
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mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
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2019-03-14 21:09:26 +03:00
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# msf2-sysreg.c
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2018-03-06 16:44:02 +03:00
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msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
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msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
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2017-09-20 23:17:34 +03:00
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msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
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2018-02-09 13:40:30 +03:00
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2019-03-14 21:09:26 +03:00
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# imx7_gpr.c
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2018-03-06 16:44:02 +03:00
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imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
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imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
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2018-02-09 21:51:39 +03:00
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2019-03-14 21:09:26 +03:00
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# mos6522.c
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2018-02-09 21:51:39 +03:00
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mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
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mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
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mos6522_set_sr_int(void) "set sr_int"
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mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
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mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
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2018-03-02 13:45:39 +03:00
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2020-09-11 08:20:49 +03:00
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# npcm7xx_clk.c
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npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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2020-09-11 08:20:48 +03:00
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# npcm7xx_gcr.c
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npcm7xx_gcr_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_gcr_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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2021-03-11 21:08:52 +03:00
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# npcm7xx_mft.c
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npcm7xx_mft_read(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16
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npcm7xx_mft_write(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16
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npcm7xx_mft_rpm(const char *clock, uint32_t clock_hz, int state, int32_t cnt, uint32_t rpm, uint32_t duty) " fan clk: %s clock_hz: %" PRIu32 ", state: %d, cnt: %" PRIi32 ", rpm: %" PRIu32 ", duty: %" PRIu32
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npcm7xx_mft_capture(const char *name, int irq_level) "%s: level: %d"
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npcm7xx_mft_update_clock(const char *name, uint16_t sel, uint64_t clock_period, uint64_t prescaled_clock_period) "%s: sel: 0x%02" PRIx16 ", period: %" PRIu64 ", prescaled: %" PRIu64
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npcm7xx_mft_set_duty(const char *name, int n, int value) "%s[%d]: %d"
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2020-10-24 00:06:35 +03:00
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# npcm7xx_rng.c
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npcm7xx_rng_read(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
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npcm7xx_rng_write(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
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2021-01-08 22:09:43 +03:00
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# npcm7xx_pwm.c
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npcm7xx_pwm_read(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_pwm_write(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_pwm_update_freq(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Freq: old_freq: %u, new_freq: %u"
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npcm7xx_pwm_update_duty(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Duty: old_duty: %u, new_duty: %u"
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2020-08-06 17:13:34 +03:00
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# stm32f4xx_syscfg.c
|
2021-03-09 14:15:10 +03:00
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|
stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interrupt: GPIO: %d, Line: %d; Level: %d"
|
2020-01-17 17:09:29 +03:00
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stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
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stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
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stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
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2020-08-06 17:13:34 +03:00
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# stm32f4xx_exti.c
|
2020-01-17 17:09:29 +03:00
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stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
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stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
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stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
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2019-03-14 21:09:26 +03:00
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# tz-mpc.c
|
2018-06-22 15:28:39 +03:00
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tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
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tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
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tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
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|
tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
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tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
|
2018-06-22 15:28:40 +03:00
|
|
|
tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
|
2018-06-22 15:28:39 +03:00
|
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|
|
2019-03-14 21:09:26 +03:00
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|
# tz-msc.c
|
2018-08-24 15:17:43 +03:00
|
|
|
tz_msc_reset(void) "TZ MSC: reset"
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|
|
tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
|
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|
|
tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
|
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|
|
tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
|
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|
|
tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
|
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|
|
tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
|
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|
|
|
2019-03-14 21:09:26 +03:00
|
|
|
# tz-ppc.c
|
2018-03-02 13:45:39 +03:00
|
|
|
tz_ppc_reset(void) "TZ PPC: reset"
|
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|
|
|
tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
|
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|
|
tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
|
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|
|
|
tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
|
|
|
|
|
tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
|
|
|
|
|
tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
|
|
|
|
|
tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
|
2018-03-06 16:43:17 +03:00
|
|
|
tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
|
|
|
|
|
tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
|
2018-03-02 13:45:39 +03:00
|
|
|
|
2019-03-14 21:09:26 +03:00
|
|
|
# iotkit-secctl.c
|
2018-03-02 13:45:39 +03:00
|
|
|
iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
|
|
|
|
|
iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
|
|
|
|
|
iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
|
|
|
|
|
iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
|
2018-08-16 16:05:28 +03:00
|
|
|
|
2019-03-14 21:09:26 +03:00
|
|
|
# imx6ul_ccm.c
|
2019-09-16 12:51:20 +03:00
|
|
|
ccm_entry(void) ""
|
|
|
|
|
ccm_freq(uint32_t freq) "freq = %d"
|
|
|
|
|
ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
|
|
|
|
|
ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
|
|
|
|
|
ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
|
2018-08-24 15:17:42 +03:00
|
|
|
|
2019-03-14 21:09:29 +03:00
|
|
|
# iotkit-sysinfo.c
|
2018-08-24 15:17:42 +03:00
|
|
|
iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
|
|
|
iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
2019-03-14 21:09:29 +03:00
|
|
|
|
|
|
|
|
# iotkit-sysctl.c
|
2018-08-24 15:17:42 +03:00
|
|
|
iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
|
|
|
iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
|
|
|
iotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
|
2019-02-01 17:55:43 +03:00
|
|
|
|
2021-02-19 17:45:53 +03:00
|
|
|
# armsse-cpu-pwrctrl.c
|
|
|
|
|
armsse_cpu_pwrctrl_read(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
|
|
|
armsse_cpu_pwrctrl_write(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
|
|
|
|
2019-03-14 21:09:26 +03:00
|
|
|
# armsse-cpuid.c
|
2019-02-01 17:55:43 +03:00
|
|
|
armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
|
|
|
armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
2019-02-28 13:55:15 +03:00
|
|
|
|
2019-03-14 21:09:26 +03:00
|
|
|
# armsse-mhu.c
|
2019-02-28 13:55:15 +03:00
|
|
|
armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
|
|
|
armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
2019-07-01 19:26:18 +03:00
|
|
|
|
|
|
|
|
# aspeed_xdma.c
|
|
|
|
|
aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
|
2019-09-26 20:34:15 +03:00
|
|
|
|
2020-08-06 17:13:34 +03:00
|
|
|
# bcm2835_property.c
|
|
|
|
|
bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
|
|
|
|
|
|
2019-09-26 20:34:15 +03:00
|
|
|
# bcm2835_mbox.c
|
|
|
|
|
bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
|
|
|
|
|
bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
|
|
|
|
|
bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
|
2019-12-19 23:14:38 +03:00
|
|
|
|
|
|
|
|
# mac_via.c
|
|
|
|
|
via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
|
|
|
|
|
via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
|
|
|
|
|
via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
|
|
|
|
|
via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
|
|
|
|
|
via1_rtc_cmd_invalid(int value) "value=0x%02x"
|
|
|
|
|
via1_rtc_internal_time(uint32_t time) "time=0x%08x"
|
|
|
|
|
via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
|
|
|
|
|
via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
|
|
|
|
|
via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
|
|
|
|
|
via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
|
|
|
|
|
via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
|
|
|
|
|
via1_rtc_cmd_test_write(int value) "value=0x%02x"
|
|
|
|
|
via1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
|
|
|
|
|
via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
|
|
|
|
|
via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
|
|
|
|
|
via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
|
|
|
|
|
via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
|
2020-06-23 23:49:33 +03:00
|
|
|
via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
|
|
|
|
|
via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
|
|
|
|
|
via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
|
2020-03-31 13:02:47 +03:00
|
|
|
|
|
|
|
|
# grlib_ahb_apb_pnp.c
|
|
|
|
|
grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
|
|
|
|
|
grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x"
|
2020-06-23 10:27:20 +03:00
|
|
|
|
2020-03-21 19:49:01 +03:00
|
|
|
# led.c
|
|
|
|
|
led_set_intensity(const char *color, const char *desc, uint8_t intensity_percent) "LED desc:'%s' color:%s intensity: %u%%"
|
2020-06-20 19:47:17 +03:00
|
|
|
led_change_intensity(const char *color, const char *desc, uint8_t old_intensity_percent, uint8_t new_intensity_percent) "LED desc:'%s' color:%s intensity %u%% -> %u%%"
|
2020-03-21 19:49:01 +03:00
|
|
|
|
2020-06-23 10:27:20 +03:00
|
|
|
# pca9552.c
|
|
|
|
|
pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
|
2020-06-23 10:27:22 +03:00
|
|
|
pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"
|
2020-10-10 16:57:49 +03:00
|
|
|
|
|
|
|
|
# bcm2835_cprman.c
|
|
|
|
|
bcm2835_cprman_read(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
|
|
|
|
|
bcm2835_cprman_write(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
|
|
|
|
|
bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
|