hw/arm/allwinner: add Security Identifier device
The Security Identifier device found in various Allwinner System on Chip designs gives applications a per-board unique identifier. This commit adds support for the Allwinner Security Identifier using a 128-bit UUID value as input. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-8-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -38,6 +38,7 @@ const hwaddr allwinner_h3_memmap[] = {
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[AW_H3_SRAM_A2] = 0x00044000,
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[AW_H3_SRAM_C] = 0x00010000,
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[AW_H3_SYSCTRL] = 0x01c00000,
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[AW_H3_SID] = 0x01c14000,
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[AW_H3_EHCI0] = 0x01c1a000,
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[AW_H3_OHCI0] = 0x01c1a400,
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[AW_H3_EHCI1] = 0x01c1b000,
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@ -78,7 +79,6 @@ struct AwH3Unimplemented {
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{ "mmc0", 0x01c0f000, 4 * KiB },
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{ "mmc1", 0x01c10000, 4 * KiB },
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{ "mmc2", 0x01c11000, 4 * KiB },
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{ "sid", 0x01c14000, 1 * KiB },
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{ "crypto", 0x01c15000, 4 * KiB },
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{ "msgbox", 0x01c17000, 4 * KiB },
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{ "spinlock", 0x01c18000, 4 * KiB },
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@ -198,6 +198,11 @@ static void allwinner_h3_init(Object *obj)
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sysbus_init_child_obj(obj, "cpucfg", &s->cpucfg, sizeof(s->cpucfg),
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TYPE_AW_CPUCFG);
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sysbus_init_child_obj(obj, "sid", &s->sid, sizeof(s->sid),
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TYPE_AW_SID);
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object_property_add_alias(obj, "identifier", OBJECT(&s->sid),
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"identifier", &error_abort);
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}
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static void allwinner_h3_realize(DeviceState *dev, Error **errp)
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@ -315,6 +320,10 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp)
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qdev_init_nofail(DEVICE(&s->cpucfg));
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, s->memmap[AW_H3_CPUCFG]);
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/* Security Identifier */
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qdev_init_nofail(DEVICE(&s->sid));
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s->memmap[AW_H3_SID]);
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/* Universal Serial Bus */
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sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI0],
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qdev_get_gpio_in(DEVICE(&s->gic),
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@ -65,6 +65,14 @@ static void orangepi_init(MachineState *machine)
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object_property_set_int(OBJECT(h3), 24 * 1000 * 1000, "clk1-freq",
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&error_abort);
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/* Setup SID properties. Currently using a default fixed SID identifier. */
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if (qemu_uuid_is_null(&h3->sid.identifier)) {
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qdev_prop_set_string(DEVICE(h3), "identifier",
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"02c00081-1111-2222-3333-000044556677");
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} else if (ldl_be_p(&h3->sid.identifier.data[0]) != 0x02c00081) {
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warn_report("Security Identifier value does not include H3 prefix");
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}
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/* Mark H3 object realized */
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object_property_set_bool(OBJECT(h3), true, "realized", &error_abort);
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@ -31,6 +31,7 @@ common-obj-$(CONFIG_IVSHMEM_DEVICE) += ivshmem.o
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common-obj-$(CONFIG_ALLWINNER_H3) += allwinner-h3-ccu.o
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obj-$(CONFIG_ALLWINNER_H3) += allwinner-cpucfg.o
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common-obj-$(CONFIG_ALLWINNER_H3) += allwinner-h3-sysctrl.o
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common-obj-$(CONFIG_ALLWINNER_H3) += allwinner-sid.o
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common-obj-$(CONFIG_REALVIEW) += arm_sysctl.o
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common-obj-$(CONFIG_NSERIES) += cbus.o
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common-obj-$(CONFIG_ECCMEMCTL) += eccmemctl.o
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168
hw/misc/allwinner-sid.c
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168
hw/misc/allwinner-sid.c
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@ -0,0 +1,168 @@
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/*
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* Allwinner Security ID emulation
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*
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* Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "hw/sysbus.h"
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#include "migration/vmstate.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "qemu/guest-random.h"
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#include "qapi/error.h"
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#include "hw/qdev-properties.h"
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#include "hw/misc/allwinner-sid.h"
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#include "trace.h"
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/* SID register offsets */
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enum {
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REG_PRCTL = 0x40, /* Control */
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REG_RDKEY = 0x60, /* Read Key */
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};
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/* SID register flags */
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enum {
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REG_PRCTL_WRITE = 0x0002, /* Unknown write flag */
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REG_PRCTL_OP_LOCK = 0xAC00, /* Lock operation */
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};
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static uint64_t allwinner_sid_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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const AwSidState *s = AW_SID(opaque);
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uint64_t val = 0;
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switch (offset) {
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case REG_PRCTL: /* Control */
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val = s->control;
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break;
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case REG_RDKEY: /* Read Key */
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val = s->rdkey;
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n",
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__func__, (uint32_t)offset);
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return 0;
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}
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trace_allwinner_sid_read(offset, val, size);
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return val;
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}
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static void allwinner_sid_write(void *opaque, hwaddr offset,
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uint64_t val, unsigned size)
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{
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AwSidState *s = AW_SID(opaque);
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trace_allwinner_sid_write(offset, val, size);
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switch (offset) {
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case REG_PRCTL: /* Control */
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s->control = val;
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if ((s->control & REG_PRCTL_OP_LOCK) &&
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(s->control & REG_PRCTL_WRITE)) {
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uint32_t id = s->control >> 16;
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if (id <= sizeof(QemuUUID) - sizeof(s->rdkey)) {
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s->rdkey = ldl_be_p(&s->identifier.data[id]);
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}
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}
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s->control &= ~REG_PRCTL_WRITE;
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break;
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case REG_RDKEY: /* Read Key */
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n",
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__func__, (uint32_t)offset);
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break;
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}
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}
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static const MemoryRegionOps allwinner_sid_ops = {
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.read = allwinner_sid_read,
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.write = allwinner_sid_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.valid = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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.impl.min_access_size = 4,
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};
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static void allwinner_sid_reset(DeviceState *dev)
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{
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AwSidState *s = AW_SID(dev);
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/* Set default values for registers */
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s->control = 0;
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s->rdkey = 0;
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}
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static void allwinner_sid_init(Object *obj)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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AwSidState *s = AW_SID(obj);
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/* Memory mapping */
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memory_region_init_io(&s->iomem, OBJECT(s), &allwinner_sid_ops, s,
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TYPE_AW_SID, 1 * KiB);
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sysbus_init_mmio(sbd, &s->iomem);
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}
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static Property allwinner_sid_properties[] = {
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DEFINE_PROP_UUID_NODEFAULT("identifier", AwSidState, identifier),
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DEFINE_PROP_END_OF_LIST()
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};
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static const VMStateDescription allwinner_sid_vmstate = {
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.name = "allwinner-sid",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(control, AwSidState),
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VMSTATE_UINT32(rdkey, AwSidState),
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VMSTATE_UINT8_ARRAY_V(identifier.data, AwSidState, sizeof(QemuUUID), 1),
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VMSTATE_END_OF_LIST()
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}
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};
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static void allwinner_sid_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = allwinner_sid_reset;
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dc->vmsd = &allwinner_sid_vmstate;
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device_class_set_props(dc, allwinner_sid_properties);
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}
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static const TypeInfo allwinner_sid_info = {
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.name = TYPE_AW_SID,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_init = allwinner_sid_init,
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.instance_size = sizeof(AwSidState),
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.class_init = allwinner_sid_class_init,
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};
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static void allwinner_sid_register(void)
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{
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type_register_static(&allwinner_sid_info);
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}
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type_init(allwinner_sid_register)
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@ -5,6 +5,10 @@ allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_ad
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allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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# allwinner-sid.c
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allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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# eccmemctl.c
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ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
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ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
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@ -42,6 +42,7 @@
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#include "hw/misc/allwinner-h3-ccu.h"
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#include "hw/misc/allwinner-cpucfg.h"
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#include "hw/misc/allwinner-h3-sysctrl.h"
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#include "hw/misc/allwinner-sid.h"
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#include "target/arm/cpu.h"
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/**
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@ -59,6 +60,7 @@ enum {
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AW_H3_SRAM_A2,
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AW_H3_SRAM_C,
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AW_H3_SYSCTRL,
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AW_H3_SID,
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AW_H3_EHCI0,
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AW_H3_OHCI0,
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AW_H3_EHCI1,
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@ -114,6 +116,7 @@ typedef struct AwH3State {
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AwH3ClockCtlState ccu;
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AwCpuCfgState cpucfg;
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AwH3SysCtrlState sysctrl;
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AwSidState sid;
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GICState gic;
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MemoryRegion sram_a1;
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MemoryRegion sram_a2;
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60
include/hw/misc/allwinner-sid.h
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60
include/hw/misc/allwinner-sid.h
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@ -0,0 +1,60 @@
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/*
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* Allwinner Security ID emulation
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*
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* Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_MISC_ALLWINNER_SID_H
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#define HW_MISC_ALLWINNER_SID_H
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#include "qom/object.h"
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#include "hw/sysbus.h"
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#include "qemu/uuid.h"
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/**
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* Object model
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* @{
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*/
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#define TYPE_AW_SID "allwinner-sid"
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#define AW_SID(obj) \
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OBJECT_CHECK(AwSidState, (obj), TYPE_AW_SID)
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/** @} */
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/**
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* Allwinner Security ID object instance state
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*/
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typedef struct AwSidState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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/** Maps I/O registers in physical memory */
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MemoryRegion iomem;
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/** Control register defines how and what to read */
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uint32_t control;
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/** RdKey register contains the data retrieved by the device */
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uint32_t rdkey;
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/** Stores the emulated device identifier */
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QemuUUID identifier;
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} AwSidState;
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#endif /* HW_MISC_ALLWINNER_SID_H */
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