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qemu/hw/misc/trace-events

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trace-events: fix first line comment in trace-events Documentation is docs/tracing.txt instead of docs/trace-events.txt. find . -name trace-events -exec \ sed -i "s?See docs/trace-events.txt for syntax documentation.?See docs/tracing.txt for syntax documentation.?" \ {} \; Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-id: 1470669081-17860-1-git-send-email-lvivier@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-08-08 18:11:21 +03:00
# See docs/tracing.txt for syntax documentation.
trace: split out trace events for hw/misc/ directory Move all trace-events for files in the hw/misc/ directory to their own file. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Message-id: 1466066426-16657-14-git-send-email-berrange@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-16 11:39:59 +03:00
# hw/misc/eccmemctl.c
ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
# hw/misc/slavio_misc.c
slavio_misc_update_irq_raise(void) "Raise IRQ"
slavio_misc_update_irq_lower(void) "Lower IRQ"
slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
apc_mem_writeb(uint32_t val) "Write power management %02x"
apc_mem_readb(uint32_t ret) "Read power management %02x"
slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
# hw/misc/milkymist-hpdmc.c
milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
# hw/misc/milkymist-pfpu.c
milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
hw/misc: Add a model for the ASPEED System Control Unit The SCU is a collection of chip-level control registers that manage the various functions supported by ASPEED SoCs. Typically the bits control interactions with clocks, external hardware or reset behaviour, and we can largly take a hands-off approach to reads and writes. Firmware makes heavy use of the state to determine how to boot, but the reset values vary from SoC to SoC (eg AST2400 vs AST2500). A qdev property is exposed so that the integrating SoC model can configure the silicon revision, which in-turn selects the appropriate reset values. Further qdev properties are exposed so the board model can configure the board-dependent hardware strapping. Almost all provided AST2400 reset values are specified by the datasheet. The notable exception is SOC_SCRATCH1, where we mark the DRAM as successfully initialised to avoid unnecessary dark corners in the SoC's u-boot support. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1466744305-23163-2-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: drop unnecessary inttypes.h include] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27 17:37:33 +03:00
# hw/misc/aspeed_scu.c
aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
hw/misc/mps2_scc: Implement MPS2 Serial Communication Controller Implement a model of the Serial Communication Controller (SCC) found in MPS2 FPGA images. The primary purpose of this device is to communicate with the Motherboard Configuration Controller (MCC) which is located on the MPS board itself, outside the FPGA image. This is used for programming the MPS clock generators. The SCC also has some basic ID registers and an output for the board LEDs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-7-git-send-email-peter.maydell@linaro.org
2017-07-17 15:36:08 +03:00
# hw/misc/mps2_scc.c
mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
mps2_scc_reset(void) "MPS2 SCC: reset"
mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
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