2007-10-29 02:42:18 +03:00
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/*
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2009-01-08 02:38:59 +03:00
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* QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
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2007-10-29 02:42:18 +03:00
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2007-11-17 20:14:51 +03:00
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#include "hw.h"
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#include "ppc.h"
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2007-10-29 02:42:18 +03:00
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#include "ppc_mac.h"
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2009-01-30 23:39:32 +03:00
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#include "mac_dbdma.h"
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2007-11-17 20:14:51 +03:00
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#include "nvram.h"
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#include "pc.h"
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#include "sysemu.h"
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#include "net.h"
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#include "isa.h"
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#include "pci.h"
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#include "boards.h"
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2008-12-24 23:29:16 +03:00
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#include "fw_cfg.h"
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2009-01-12 20:40:23 +03:00
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#include "escc.h"
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2007-10-29 02:42:18 +03:00
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2007-12-02 07:51:10 +03:00
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#define MAX_IDE_BUS 2
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2008-12-21 02:40:35 +03:00
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#define VGA_BIOS_SIZE 65536
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2008-12-24 23:29:16 +03:00
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#define CFG_ADDR 0xf0000510
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2007-10-29 02:42:18 +03:00
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/* temporary frame buffer OSI calls for the video.x driver. The right
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solution is to modify the driver to use VGA PCI I/Os */
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/* XXX: to be removed. This is no way related to emulation */
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static int vga_osi_call (CPUState *env)
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{
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static int vga_vbl_enabled;
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int linesize;
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2007-11-24 05:56:36 +03:00
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// printf("osi_call R5=" REGX "\n", ppc_dump_gpr(env, 5));
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2007-10-29 02:42:18 +03:00
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/* same handler as PearPC, coming from the original MOL video
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driver. */
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switch(env->gpr[5]) {
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case 4:
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break;
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case 28: /* set_vmode */
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if (env->gpr[6] != 1 || env->gpr[7] != 0)
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env->gpr[3] = 1;
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else
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env->gpr[3] = 0;
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break;
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case 29: /* get_vmode_info */
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if (env->gpr[6] != 0) {
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if (env->gpr[6] != 1 || env->gpr[7] != 0) {
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env->gpr[3] = 1;
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break;
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}
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}
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env->gpr[3] = 0;
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env->gpr[4] = (1 << 16) | 1; /* num_vmodes, cur_vmode */
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env->gpr[5] = (1 << 16) | 0; /* num_depths, cur_depth_mode */
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env->gpr[6] = (graphic_width << 16) | graphic_height; /* w, h */
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env->gpr[7] = 85 << 16; /* refresh rate */
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env->gpr[8] = (graphic_depth + 7) & ~7; /* depth (round to byte) */
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linesize = ((graphic_depth + 7) >> 3) * graphic_width;
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linesize = (linesize + 3) & ~3;
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env->gpr[9] = (linesize << 16) | 0; /* row_bytes, offset */
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break;
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case 31: /* set_video power */
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env->gpr[3] = 0;
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break;
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case 39: /* video_ctrl */
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if (env->gpr[6] == 0 || env->gpr[6] == 1)
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vga_vbl_enabled = env->gpr[6];
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env->gpr[3] = 0;
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break;
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case 47:
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break;
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case 59: /* set_color */
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/* R6 = index, R7 = RGB */
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env->gpr[3] = 0;
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break;
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case 64: /* get color */
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/* R6 = index */
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env->gpr[3] = 0;
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break;
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case 116: /* set hwcursor */
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/* R6 = x, R7 = y, R8 = visible, R9 = data */
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break;
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default:
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2007-11-24 05:56:36 +03:00
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fprintf(stderr, "unsupported OSI call R5=" REGX "\n",
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ppc_dump_gpr(env, 5));
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2007-10-29 02:42:18 +03:00
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break;
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}
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return 1; /* osi_call handled */
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}
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2009-03-08 12:51:29 +03:00
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static int fw_cfg_boot_set(void *opaque, const char *boot_device)
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{
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fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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return 0;
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}
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2009-05-13 20:56:25 +04:00
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static void ppc_heathrow_init (ram_addr_t ram_size,
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2009-01-16 22:04:14 +03:00
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const char *boot_device,
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2007-10-29 02:42:18 +03:00
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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2007-11-10 18:15:54 +03:00
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CPUState *env = NULL, *envs[MAX_CPUS];
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2009-05-30 03:52:44 +04:00
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char *filename;
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2007-10-29 02:42:18 +03:00
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qemu_irq *pic, **heathrow_irqs;
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int linux_boot, i;
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2009-04-10 06:24:36 +04:00
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ram_addr_t ram_offset, bios_offset, vga_bios_offset;
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2009-01-24 15:00:23 +03:00
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uint32_t kernel_base, initrd_base;
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int32_t kernel_size, initrd_size;
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2007-10-29 02:42:18 +03:00
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PCIBus *pci_bus;
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MacIONVRAMState *nvr;
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int vga_bios_size, bios_size;
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int pic_mem_index, nvram_mem_index, dbdma_mem_index, cuda_mem_index;
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2009-01-12 20:40:23 +03:00
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int escc_mem_index, ide_mem_index[2];
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2009-03-08 12:51:29 +03:00
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uint16_t ppc_boot_device;
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2007-12-02 07:51:10 +03:00
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BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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int index;
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2008-12-24 23:29:16 +03:00
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void *fw_cfg;
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2009-01-30 23:39:32 +03:00
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void *dbdma;
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2009-04-10 04:26:15 +04:00
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uint8_t *vga_bios_ptr;
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2007-10-29 02:42:18 +03:00
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linux_boot = (kernel_filename != NULL);
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/* init CPUs */
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if (cpu_model == NULL)
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2008-12-21 02:39:46 +03:00
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cpu_model = "G3";
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2007-10-29 02:42:18 +03:00
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for (i = 0; i < smp_cpus; i++) {
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2007-11-10 18:15:54 +03:00
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env = cpu_init(cpu_model);
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if (!env) {
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fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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exit(1);
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}
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2009-01-14 17:48:04 +03:00
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/* Set time-base frequency to 16.6 Mhz */
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cpu_ppc_tb_init(env, 16600000UL);
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2007-10-29 02:42:18 +03:00
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env->osi_call = vga_osi_call;
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2009-06-27 11:25:07 +04:00
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qemu_register_reset(&cpu_ppc_reset, env);
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2007-10-29 02:42:18 +03:00
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envs[i] = env;
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}
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/* allocate RAM */
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2009-01-13 22:08:10 +03:00
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if (ram_size > (2047 << 20)) {
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fprintf(stderr,
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"qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
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((unsigned int)ram_size / (1 << 20)));
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exit(1);
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}
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2008-12-21 02:40:35 +03:00
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ram_offset = qemu_ram_alloc(ram_size);
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cpu_register_physical_memory(0, ram_size, ram_offset);
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2007-10-29 02:42:18 +03:00
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/* allocate and load BIOS */
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2008-12-21 02:40:35 +03:00
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bios_offset = qemu_ram_alloc(BIOS_SIZE);
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2007-10-29 02:42:18 +03:00
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if (bios_name == NULL)
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2008-12-24 23:23:51 +03:00
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bios_name = PROM_FILENAME;
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2009-05-30 03:52:44 +04:00
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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2008-12-24 23:23:51 +03:00
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cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
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/* Load OpenBIOS (ELF) */
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2009-05-30 03:52:44 +04:00
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if (filename) {
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bios_size = load_elf(filename, 0, NULL, NULL, NULL);
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qemu_free(filename);
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} else {
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bios_size = -1;
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}
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2007-10-29 02:42:18 +03:00
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if (bios_size < 0 || bios_size > BIOS_SIZE) {
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2009-05-30 03:52:44 +04:00
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hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
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2007-10-29 02:42:18 +03:00
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exit(1);
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}
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/* allocate and load VGA BIOS */
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2008-12-21 02:40:35 +03:00
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vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
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2009-04-10 04:26:15 +04:00
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vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
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2009-05-30 03:52:44 +04:00
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
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if (filename) {
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vga_bios_size = load_image(filename, vga_bios_ptr + 8);
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qemu_free(filename);
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} else {
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vga_bios_size = -1;
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}
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2007-10-29 02:42:18 +03:00
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if (vga_bios_size < 0) {
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/* if no bios is present, we can still work */
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2009-05-30 03:52:44 +04:00
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fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
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VGABIOS_FILENAME);
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2007-10-29 02:42:18 +03:00
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vga_bios_size = 0;
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} else {
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/* set a specific header (XXX: find real Apple format for NDRV
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drivers) */
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2009-04-10 04:26:15 +04:00
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vga_bios_ptr[0] = 'N';
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vga_bios_ptr[1] = 'D';
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vga_bios_ptr[2] = 'R';
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vga_bios_ptr[3] = 'V';
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cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
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2007-10-29 02:42:18 +03:00
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vga_bios_size += 8;
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}
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if (linux_boot) {
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2009-01-26 13:22:15 +03:00
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uint64_t lowaddr = 0;
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2007-10-29 02:42:18 +03:00
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kernel_base = KERNEL_LOAD_ADDR;
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2009-01-26 13:22:15 +03:00
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/* Now we can load the kernel. The first step tries to load the kernel
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supposing PhysAddr = 0x00000000. If that was wrong the kernel is
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loaded again, the new PhysAddr being computed from lowaddr. */
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kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL);
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if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
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kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
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NULL, 0, NULL);
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}
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2008-12-24 23:30:01 +03:00
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if (kernel_size < 0)
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kernel_size = load_aout(kernel_filename, kernel_base,
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ram_size - kernel_base);
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if (kernel_size < 0)
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kernel_size = load_image_targphys(kernel_filename,
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kernel_base,
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ram_size - kernel_base);
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2007-10-29 02:42:18 +03:00
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if (kernel_size < 0) {
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2009-05-08 05:35:15 +04:00
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hw_error("qemu: could not load kernel '%s'\n",
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2007-10-29 02:42:18 +03:00
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kernel_filename);
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exit(1);
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}
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/* load initrd */
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if (initrd_filename) {
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initrd_base = INITRD_LOAD_ADDR;
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2009-04-10 00:05:49 +04:00
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initrd_size = load_image_targphys(initrd_filename, initrd_base,
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ram_size - initrd_base);
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2007-10-29 02:42:18 +03:00
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if (initrd_size < 0) {
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2009-05-08 05:35:15 +04:00
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hw_error("qemu: could not load initial ram disk '%s'\n",
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initrd_filename);
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2007-10-29 02:42:18 +03:00
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exit(1);
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}
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} else {
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initrd_base = 0;
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initrd_size = 0;
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}
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2007-10-31 04:54:04 +03:00
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ppc_boot_device = 'm';
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2007-10-29 02:42:18 +03:00
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} else {
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kernel_base = 0;
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kernel_size = 0;
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initrd_base = 0;
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initrd_size = 0;
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2007-11-11 04:50:45 +03:00
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ppc_boot_device = '\0';
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2007-11-11 17:44:28 +03:00
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for (i = 0; boot_device[i] != '\0'; i++) {
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2007-11-11 04:50:45 +03:00
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/* TOFIX: for now, the second IDE channel is not properly
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2007-11-11 17:44:28 +03:00
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* used by OHW. The Mac floppy disk are not emulated.
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2007-11-11 04:50:45 +03:00
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* For now, OHW cannot boot from the network.
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*/
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#if 0
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2007-11-11 17:44:28 +03:00
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if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
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ppc_boot_device = boot_device[i];
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2007-11-11 04:50:45 +03:00
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break;
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2007-11-11 17:44:28 +03:00
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}
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2007-11-11 04:50:45 +03:00
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#else
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2007-11-11 17:44:28 +03:00
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if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
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ppc_boot_device = boot_device[i];
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2007-11-11 04:50:45 +03:00
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break;
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2007-11-11 17:44:28 +03:00
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}
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2007-11-11 04:50:45 +03:00
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#endif
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}
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|
|
if (ppc_boot_device == '\0') {
|
2009-01-13 22:07:59 +03:00
|
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|
fprintf(stderr, "No valid boot device for G3 Beige machine\n");
|
2007-11-11 04:50:45 +03:00
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|
exit(1);
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}
|
2007-10-29 02:42:18 +03:00
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}
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isa_mem_base = 0x80000000;
|
2007-11-24 05:56:36 +03:00
|
|
|
|
2007-10-29 02:42:18 +03:00
|
|
|
/* Register 2 MB of ISA IO space */
|
|
|
|
isa_mmio_init(0xfe000000, 0x00200000);
|
|
|
|
|
|
|
|
/* XXX: we register only 1 output pin for heathrow PIC */
|
|
|
|
heathrow_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
|
|
|
|
heathrow_irqs[0] =
|
|
|
|
qemu_mallocz(smp_cpus * sizeof(qemu_irq) * 1);
|
|
|
|
/* Connect the heathrow PIC outputs to the 6xx bus */
|
|
|
|
for (i = 0; i < smp_cpus; i++) {
|
|
|
|
switch (PPC_INPUT(env)) {
|
|
|
|
case PPC_FLAGS_INPUT_6xx:
|
|
|
|
heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
|
|
|
|
heathrow_irqs[i][0] =
|
|
|
|
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
|
|
|
|
break;
|
|
|
|
default:
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("Bus model not supported on OldWorld Mac machine\n");
|
2007-10-29 02:42:18 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* init basic PC hardware */
|
|
|
|
if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("Only 6xx bus is supported on heathrow machine\n");
|
2007-10-29 02:42:18 +03:00
|
|
|
}
|
|
|
|
pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
|
|
|
|
pci_bus = pci_grackle_init(0xfec00000, pic);
|
2009-05-13 20:56:25 +04:00
|
|
|
pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
|
2007-11-24 05:56:36 +03:00
|
|
|
|
2009-01-14 17:47:56 +03:00
|
|
|
escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
|
2009-01-12 20:40:23 +03:00
|
|
|
serial_hds[1], ESCC_CLOCK, 4);
|
2007-11-24 05:56:36 +03:00
|
|
|
|
2009-01-13 22:47:10 +03:00
|
|
|
for(i = 0; i < nb_nics; i++)
|
2009-06-18 17:14:08 +04:00
|
|
|
pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
|
2007-11-11 17:44:28 +03:00
|
|
|
|
2007-12-02 07:51:10 +03:00
|
|
|
|
|
|
|
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
|
|
|
|
fprintf(stderr, "qemu: too many IDE bus\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
2009-03-08 00:35:21 +03:00
|
|
|
|
|
|
|
/* First IDE channel is a MAC IDE on the MacIO bus */
|
2007-12-02 07:51:10 +03:00
|
|
|
index = drive_get_index(IF_IDE, 0, 0);
|
|
|
|
if (index == -1)
|
|
|
|
hd[0] = NULL;
|
|
|
|
else
|
|
|
|
hd[0] = drives_table[index].bdrv;
|
|
|
|
index = drive_get_index(IF_IDE, 0, 1);
|
|
|
|
if (index == -1)
|
|
|
|
hd[1] = NULL;
|
|
|
|
else
|
|
|
|
hd[1] = drives_table[index].bdrv;
|
2009-03-08 00:35:21 +03:00
|
|
|
dbdma = DBDMA_init(&dbdma_mem_index);
|
|
|
|
ide_mem_index[0] = -1;
|
|
|
|
ide_mem_index[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
|
2007-12-02 07:51:10 +03:00
|
|
|
|
2009-03-08 00:35:21 +03:00
|
|
|
/* Second IDE channel is a CMD646 on the PCI bus */
|
2007-12-02 07:51:10 +03:00
|
|
|
index = drive_get_index(IF_IDE, 1, 0);
|
|
|
|
if (index == -1)
|
|
|
|
hd[0] = NULL;
|
|
|
|
else
|
|
|
|
hd[0] = drives_table[index].bdrv;
|
|
|
|
index = drive_get_index(IF_IDE, 1, 1);
|
|
|
|
if (index == -1)
|
|
|
|
hd[1] = NULL;
|
|
|
|
else
|
|
|
|
hd[1] = drives_table[index].bdrv;
|
2009-03-08 00:35:21 +03:00
|
|
|
hd[3] = hd[2] = NULL;
|
|
|
|
pci_cmd646_ide_init(pci_bus, hd, 0);
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
/* cuda also initialize ADB */
|
|
|
|
cuda_init(&cuda_mem_index, pic[0x12]);
|
|
|
|
|
|
|
|
adb_kbd_init(&adb_bus);
|
|
|
|
adb_mouse_init(&adb_bus);
|
2007-11-24 05:56:36 +03:00
|
|
|
|
2009-02-07 13:48:26 +03:00
|
|
|
nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 4);
|
2007-10-29 02:42:18 +03:00
|
|
|
pmac_format_nvram_partition(nvr, 0x2000);
|
|
|
|
|
2009-02-01 15:01:04 +03:00
|
|
|
macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem_index,
|
|
|
|
dbdma_mem_index, cuda_mem_index, nvr, 2, ide_mem_index,
|
|
|
|
escc_mem_index);
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
if (usb_enabled) {
|
|
|
|
usb_ohci_init_pci(pci_bus, 3, -1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
|
|
|
|
graphic_depth = 15;
|
|
|
|
|
|
|
|
/* No PCI init: the BIOS will do it */
|
|
|
|
|
2008-12-24 23:29:16 +03:00
|
|
|
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
|
|
|
|
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
|
|
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
|
2009-03-08 12:51:29 +03:00
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
|
|
|
|
if (kernel_cmdline) {
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
|
|
|
|
pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
|
|
|
|
} else {
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
|
|
|
|
}
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
|
|
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
|
|
|
|
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
|
2007-10-29 02:42:18 +03:00
|
|
|
}
|
|
|
|
|
2009-05-21 03:38:09 +04:00
|
|
|
static QEMUMachine heathrow_machine = {
|
2009-01-08 02:38:59 +03:00
|
|
|
.name = "g3beige",
|
2008-10-08 00:34:35 +04:00
|
|
|
.desc = "Heathrow based PowerMAC",
|
|
|
|
.init = ppc_heathrow_init,
|
2008-10-28 13:59:59 +03:00
|
|
|
.max_cpus = MAX_CPUS,
|
2009-05-22 05:41:01 +04:00
|
|
|
.is_default = 1,
|
2007-10-29 02:42:18 +03:00
|
|
|
};
|
2009-05-21 03:38:09 +04:00
|
|
|
|
|
|
|
static void heathrow_machine_init(void)
|
|
|
|
{
|
|
|
|
qemu_register_machine(&heathrow_machine);
|
|
|
|
}
|
|
|
|
|
|
|
|
machine_init(heathrow_machine_init);
|