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escc: allow one IRQ per serial channel

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The Z85C30 on the PowerMAC machines have one interrupt per serial
channel, while the Sparc machines have only one for both. Allow the
emulated device to use one IRQ per channel.

Patch by Laurent Vivier.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6295 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-01-14 14:47:56 +00:00
parent 13d7ec0f81
commit aeeb69c73e
5 changed files with 18 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
hw/escc.c
View File

@ -719,8 +719,9 @@ static int escc_load(QEMUFile *f, void *opaque, int version_id)
}
int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
CharDriverState *chrB, int clock, int it_shift)
int escc_init(target_phys_addr_t base, qemu_irq irqA, qemu_irq irqB,
CharDriverState *chrA, CharDriverState *chrB,
int clock, int it_shift)
{
int escc_io_memory, i;
SerialState *s;
@ -741,9 +742,10 @@ int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
s->chn[1].chr = chrA;
s->chn[0].disabled = 0;
s->chn[1].disabled = 0;
s->chn[0].irq = irqB;
s->chn[1].irq = irqA;
for (i = 0; i < 2; i++) {
s->chn[i].irq = irq;
s->chn[i].chn = 1 - i;
s->chn[i].type = ser;
s->chn[i].clock = clock / 2;

5
hw/escc.h
View File

@ -1,7 +1,8 @@
/* escc.c */
#define ESCC_SIZE 4
int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
CharDriverState *chrB, int clock, int it_shift);
int escc_init(target_phys_addr_t base, qemu_irq irqA, qemu_irq irqB,
CharDriverState *chrA, CharDriverState *chrB,
int clock, int it_shift);
void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq,
int disabled, int clock, int it_shift);

4
hw/ppc_chrp.c
View File

@ -263,8 +263,8 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
/* XXX: suppress that */
dummy_irq = i8259_init(NULL);
escc_mem_index = escc_init(0x80013000, dummy_irq[4], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 4);
escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
for(i = 0; i < nb_nics; i++)
pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");

2
hw/ppc_oldworld.c
View File

@ -304,7 +304,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
/* XXX: suppress that */
dummy_irq = i8259_init(NULL);
escc_mem_index = escc_init(0x80013000, pic[0x10], serial_hds[0],
escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 4);
for(i = 0; i < nb_nics; i++)

13
hw/sun4m.c
View File

@ -548,8 +548,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
nographic, ESCC_CLOCK, 1);
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 1);
escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], slavio_irq[hwdef->ser_irq],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
cpu_halt = qemu_allocate_irqs(cpu_halt_signal, NULL, 1);
slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->apc_base,
@ -1331,8 +1331,8 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
nographic, ESCC_CLOCK, 1);
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
escc_init(hwdef->serial_base, sbi_irq[hwdef->ser_irq], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 1);
escc_init(hwdef->serial_base, sbi_irq[hwdef->ser_irq], sbi_irq[hwdef->ser_irq],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
if (drive_get_max_bus(IF_SCSI) > 0) {
fprintf(stderr, "qemu: too many SCSI bus\n");
@ -1534,8 +1534,9 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
nographic, ESCC_CLOCK, 1);
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 1);
escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
slavio_irq[hwdef->ser_irq], serial_hds[0], serial_hds[1],
ESCC_CLOCK, 1);
slavio_misc = slavio_misc_init(0, 0, hwdef->aux1_base, 0,
slavio_irq[hwdef->me_irq], NULL, &fdc_tc);